2005-12-30 01:14:56 +00:00
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require 'rex/poly'
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require 'msf/core'
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module Msf
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module Encoders
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module X86
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class ShikataGaNai < Msf::Encoder::XorAdditiveFeedback
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# The shikata encoder has an excellent ranking because it is polymorphic.
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# Party time, excellent!
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Rank = ExcellentRanking
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def initialize
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super(
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'Name' => 'Polymorphic XOR Additive Feedback Encoder',
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'Version' => '$Revision$',
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'Description' => %q{
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This encoder implements a polymorphic XOR additive feedback encoder.
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The decoder stub is generated based on dynamic instruction
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substitution and dynamic block ordering. Registers are also
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selected dynamically.
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},
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'Author' => 'spoonm',
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'Arch' => ARCH_X86,
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'Decoder' =>
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{
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'KeySize' => 4,
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'BlockSize' => 4
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})
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end
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#
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# Generates the shikata decoder stub.
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#
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def decoder_stub(state)
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# If the decoder stub has not already been generated for this state, do
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# it now. The decoder stub method may be called more than once.
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if (state.decoder_stub == nil)
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block = generate_shikata_block(state.buf.length + 4)
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# Set the state specific key offset to wherever the XORK ended up.
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state.decoder_key_offset = block.index('XORK')
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# Take the last four bytes of shikata and prepend them to the buffer
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# that is going to be encoded.
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state.buf = block.slice!(block.length - 4, 4) + state.buf
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# Cache this decoder stub. The reason we cache the decoder stub is
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# because we need to ensure that the same stub is returned every time
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# for a given encoder state.
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state.decoder_stub = block
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end
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state.decoder_stub
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end
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protected
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#
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# Returns the set of FPU instructions that can be used for the FPU block of
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# the decoder stub.
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#
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def fpu_instructions
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fpus = []
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0xe8.upto(0xee) { |x| fpus << "\xd9" + x.chr }
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0xc0.upto(0xcf) { |x| fpus << "\xd9" + x.chr }
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0xc0.upto(0xdf) { |x| fpus << "\xda" + x.chr }
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0xc0.upto(0xdf) { |x| fpus << "\xdb" + x.chr }
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0xc0.upto(0xc7) { |x| fpus << "\xdd" + x.chr }
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fpus << "\xd9\xd0"
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fpus << "\xd9\xe1"
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fpus << "\xd9\xf6"
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fpus << "\xd9\xf7"
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fpus << "\xd9\xe5"
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2005-12-30 05:00:19 +00:00
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# This FPU instruction seems to fail consistently on Linux
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#fpus << "\xdb\xe1"
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2005-12-30 01:14:56 +00:00
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fpus
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end
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#
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# Returns a polymorphic decoder stub that is capable of decoding a buffer
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# of the supplied length.
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#
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def generate_shikata_block(length)
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# Declare logical registers
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count_reg = Rex::Poly::LogicalRegister::X86.new('count', 'ecx')
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addr_reg = Rex::Poly::LogicalRegister::X86.new('addr')
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key_reg = Rex::Poly::LogicalRegister::X86.new('key')
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# Declare individual blocks
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endb = Rex::Poly::SymbolicBlock::End.new
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# FPU blocks
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fpu = Rex::Poly::LogicalBlock.new('fpu',
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*fpu_instructions)
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fnstenv = Rex::Poly::LogicalBlock.new('fnstenv',
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"\xd9\x74\x24\xf4")
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# Get EIP off the stack
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popeip = Rex::Poly::LogicalBlock.new('popeip',
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Proc.new { |b| (0x58 + b.regnum_of(addr_reg)).chr })
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# Clear the counter register
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clear_register = Rex::Poly::LogicalBlock.new('clear_register',
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"\x31\xc9",
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"\x29\xc9",
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"\x33\xc9",
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"\x2b\xc9")
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# Initialize the counter after zeroing it
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init_counter = Rex::Poly::LogicalBlock.new('init_counter')
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# Divide the length by four but ensure that it aligns on a block size
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# boundary (4 byte).
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length += 4 + (4 - (length & 3)) & 3
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length /= 4
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if (length <= 255)
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init_counter.add_perm("\xb1" + [ length ].pack('C'))
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else
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init_counter.add_perm("\x66\xb9" + [ length ].pack('v'))
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end
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# Key initialization block
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init_key = Rex::Poly::LogicalBlock.new('init_key',
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Proc.new { |b| (0xb8 + b.regnum_of(key_reg)).chr + 'XORK'})
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# Decoder loop block
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loop_block = Rex::Poly::LogicalBlock.new('loop_block')
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xor = Proc.new { |b| "\x31" + (0x40 + b.regnum_of(addr_reg) + (8 * b.regnum_of(key_reg))).chr }
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xor1 = Proc.new { |b| xor.call(b) + [ (b.offset_of(endb) - b.offset_of(fpu) - 4) ].pack('c') }
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xor2 = Proc.new { |b| xor.call(b) + [ (b.offset_of(endb) - b.offset_of(fpu) - 8) ].pack('c') }
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add = Proc.new { |b| "\x03" + (0x40 + b.regnum_of(addr_reg) + (8 * b.regnum_of(key_reg))).chr }
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add1 = Proc.new { |b| add.call(b) + [ (b.offset_of(endb) - b.offset_of(fpu) - 4) ].pack('c') }
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add2 = Proc.new { |b| add.call(b) + [ (b.offset_of(endb) - b.offset_of(fpu) - 8) ].pack('c') }
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sub4 = Proc.new { |b| "\x83" + (0xe8 + b.regnum_of(addr_reg)).chr + "\xfc" }
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add4 = Proc.new { |b| "\x83" + (0xc0 + b.regnum_of(addr_reg)).chr + "\x04" }
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loop_block.add_perm(
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Proc.new { |b| xor1.call(b) + add1.call(b) + sub4.call(b) },
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Proc.new { |b| xor1.call(b) + sub4.call(b) + add2.call(b) },
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Proc.new { |b| sub4.call(b) + xor2.call(b) + add2.call(b) },
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Proc.new { |b| xor1.call(b) + add1.call(b) + add4.call(b) },
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Proc.new { |b| xor1.call(b) + add4.call(b) + add2.call(b) },
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Proc.new { |b| add4.call(b) + xor2.call(b) + add2.call(b) })
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# Loop instruction block
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loop_inst = Rex::Poly::LogicalBlock.new('loop_inst',
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"\xe2\xf5")
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# Define block dependencies
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fnstenv.depends_on(fpu)
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popeip.depends_on(fnstenv)
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init_counter.depends_on(clear_register)
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loop_block.depends_on(popeip, init_counter, init_key)
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loop_inst.depends_on(loop_block)
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# Generate a permutation saving the ECX and ESP registers
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loop_inst.generate([
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Rex::Arch::X86::ESP,
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Rex::Arch::X86::ECX ])
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end
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end
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end end end
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