mirror of https://github.com/hak5/openwrt.git
ag71xx: Fix rx ring buffer stall on small packets flood on qca956x and qca953x.
Backported from Code Aurora QSDK Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>lede-17.01
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e07ee06aad
commit
c3cdc53164
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@ -996,6 +996,9 @@ void __init ath79_register_eth(unsigned int id)
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pdata->reset_bit = AR934X_RESET_GE0_MAC |
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AR934X_RESET_GE0_MDIO;
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pdata->set_speed = ar934x_set_speed_ge0;
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if (ath79_soc == ATH79_SOC_QCA9533)
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pdata->disable_inline_checksum_engine = 1;
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} else {
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pdata->reset_bit = AR934X_RESET_GE1_MAC |
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AR934X_RESET_GE1_MDIO;
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@ -1097,6 +1100,8 @@ void __init ath79_register_eth(unsigned int id)
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pdata->set_speed = qca956x_set_speed_sgmii;
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else
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pdata->set_speed = ar934x_set_speed_ge0;
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pdata->disable_inline_checksum_engine = 1;
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} else {
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pdata->reset_bit = QCA955X_RESET_GE1_MAC |
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QCA955X_RESET_GE1_MDIO;
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@ -37,7 +37,7 @@ struct ag71xx_platform_data {
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u8 is_ar724x:1;
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u8 has_ar8216:1;
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u8 use_flow_control:1;
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u8 is_qca956x:1;
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u8 disable_inline_checksum_engine:1;
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struct ag71xx_switch_platform_data *switch_data;
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@ -629,6 +629,22 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update)
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ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
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ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
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if (pdata->disable_inline_checksum_engine) {
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/*
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* The rx ring buffer can stall on small packets on QCA953x and
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* QCA956x. Disabling the inline checksum engine fixes the stall.
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* The wr, rr functions cannot be used since this hidden register
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* is outside of the normal ag71xx register block.
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*/
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void __iomem *dam = ioremap_nocache(0xb90001bc, 0x4);
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if (dam) {
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__raw_writel(__raw_readl(dam) & ~BIT(27), dam);
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(void)__raw_readl(dam);
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iounmap(dam);
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}
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}
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ag71xx_hw_start(ag);
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netif_carrier_on(ag->dev);
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