Felix Fietkau 5c6925a23b ar71xx: Remove TX/RX delay from pll_1000 for OM5P-AN ... The tx/rx delay bits in the ETH_XMII_CONTROL register have to be unset when the enable_rgmii_rx_delay/enable_rgmii_tx_delay will be set in the AT803x PHY. Othwise the throughput in gigabit mode is heavily reduced. Signed-off-by: Sven Eckelmann <sven@open-mesh.org> SVN-Revision: 45521		2015-04-20 15:00:20 +00:00
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mips	ar71xx: Remove TX/RX delay from pll_1000 for OM5P-AN	2015-04-20 15:00:20 +00:00