mirror of https://github.com/hak5/openwrt-owl.git
75 lines
1.8 KiB
Diff
75 lines
1.8 KiB
Diff
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Tue, 27 Jun 2017 19:35:27 +0200
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Subject: [PATCH] ARM: dts: BCM5301X: Specify USB ports for each controller
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Northstar has 3 controllers: OHCI and EHCI (each with 2 ports) and XHCI
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(with just 1 port). Describe them in the DT. In future this will allow
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to reference them as trigger sources.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/bcm5301x.dtsi | 34 ++++++++++++++++++++++++++++++++++
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1 file changed, 34 insertions(+)
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -272,6 +272,19 @@
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reg = <0x00021000 0x1000>;
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb2_phy>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ ehci_port1: port@1 {
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+ reg = <1>;
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+ #trigger-source-cells = <0>;
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+ };
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+
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+ ehci_port2: port@2 {
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+ reg = <2>;
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+ #trigger-source-cells = <0>;
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+ };
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};
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ohci: ohci@22000 {
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@@ -280,6 +293,19 @@
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compatible = "generic-ohci";
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reg = <0x00022000 0x1000>;
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ ohci_port1: port@1 {
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+ reg = <1>;
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+ #trigger-source-cells = <0>;
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+ };
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+
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+ ohci_port2: port@2 {
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+ reg = <2>;
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+ #trigger-source-cells = <0>;
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+ };
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};
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};
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@@ -300,6 +326,14 @@
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb3_phy>;
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phy-names = "usb";
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ xhci_port1: port@1 {
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+ reg = <1>;
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+ #trigger-source-cells = <0>;
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+ };
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};
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};
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