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# SPI
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SPI is a serial peripheral interface. The controller selects a chip it send and receive information to and from. NOR flash chips with an SPI interface are commonly used as firmware boot chip. SPI has one read and one write line. In QSPI mode, 4 lines are used in parallel.
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### Dump Firmware via SPI
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```powershell
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sudo flashrom -p linux spi:dev=/dev/spidev0.0,spispeed=1000 -r dump.bin
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```
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An ESP8266 and ESP32 has several SPI busses available in hardware, SPI0 is hooked up to it's own internal flash and is not intended for use, but the HSPI and VSPI busses can be used in combination with a SOIC-8 clamp to read from SPI NOR chips. cheap clips have a tendency to jump of the chips, pomona 5250 has a better grip.
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```powershell
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$ python ./esptool.py read_flash --spi-connection HSPI 0 0x400000 flash_dump.bin
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```
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### SPIFFS
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```powershell
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$ ./mkspiffs -u /tmp/data -p 256 -b 8192 -s 1028096 /tmp/spiffs/bin
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```
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### ESP32 Diagrams
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Color coded which pins can be connected from the ESP HSPI pins to an SPI flash. The pink interfaces are optional to switch to QSPI
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<p align="center">
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<img src="../assets/Esp32.png" style="max-width: 400px;"><br />
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<img src="../assets/Qspi.png" style="max-width: 400px;">
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</p>
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### References
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* https://www.youtube.com/watch?v=Bn5zajZ4I5E
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