1) Fixed a minor bug, sometimes Opty2 would generate C1 /6 instructions which most processors will execute but which are not technically valid (they would exist for SAL but SAL is an alias for SHL so it is defined as C1 /4).
2) I changed the 0x90 nop instruction so that it is no longer considered that 0x90 changes the eax register.
3) Removed o16/0x66 prepend byte from 0x0f, this is currently unused anyways but might prevent some poor person from debugging it in the future.
4) Previously short jumps would only make positive jumps, I added the capability for them to make a "-1" jump which would basically just start executing at the offset byte. For example it could generate something like EB FF XX YY ... where EB FF jumps to FF XX YY ...
5) I added support for the instructions mov reg, segreg (8C), mov reg, imm8/imm32 (C6/C7), and lea reg, mem (8D). I implemented LEA so that it only allows memory references to be in ModR/M form and not be in SIB form (I don't think it's possible to allow SIB in the way Opty2 works at the moment).
git-svn-id: file:///home/svn/framework3/trunk@5804 4d416f70-5f16-0410-b530-b9f4589650da
James Lee
HD Moore
Ramon de C Valle
Matt Miller