Fix a small bug and fix some comments
git-svn-id: file:///home/svn/incoming/trunk@3284 4d416f70-5f16-0410-b530-b9f4589650daunstable
parent
3234172a41
commit
e9b4f0d9f1
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@ -70,8 +70,8 @@ class Vlad902 < Msf::Nop
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def initialize
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super(
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'Name' => 'Vlad902 SPARC',
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'Alias' => 'ppc_simple',
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'Name' => 'SPARC NOP generator',
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'Alias' => 'sparc_simple',
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'Version' => '$Revision$',
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'Description' => 'SPARC NOP generator',
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'Author' => 'vlad902',
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@ -134,13 +134,13 @@ class Vlad902 < Msf::Nop
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def get_dst_reg
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reg = rand(30)
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reg += 1 if (reg >= 14)
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reg += 1 if (reg >= 30)
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reg += 1 if (reg >= 14) # %sp
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reg += 1 if (reg >= 30) # %fp
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return reg.to_i
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end
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def get_src_reg
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return rand(30).to_i
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return rand(32).to_i
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end
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def ins_sethi(ref, len=0)
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@ -187,8 +187,8 @@ class Vlad902 < Msf::Nop
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def ins_branch(ref, len)
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# We jump to 1 instruction before the payload so in cases where the delay slot of a branch with the the anull bit set that is not taken the first instruction of the
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# payload is not anulled.
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# We jump to 1 instruction before the payload so in cases where the delay slot is another branch instruction that is
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# not taken with the anull bit set the first bit of the payload is not anulled.
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len = (len / 4) - 1
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return '' if len == 0
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