From 4e8092aceb580facafda27813b6aaa7c363073b5 Mon Sep 17 00:00:00 2001 From: jvazquez-r7 Date: Thu, 9 Jan 2014 17:34:59 -0600 Subject: [PATCH] Fix armle stagers --- modules/payloads/stagers/linux/armle/bind_tcp.rb | 4 +--- modules/payloads/stagers/linux/armle/reverse_tcp.rb | 2 -- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/modules/payloads/stagers/linux/armle/bind_tcp.rb b/modules/payloads/stagers/linux/armle/bind_tcp.rb index ef0c502c48..763a20a329 100644 --- a/modules/payloads/stagers/linux/armle/bind_tcp.rb +++ b/modules/payloads/stagers/linux/armle/bind_tcp.rb @@ -33,7 +33,7 @@ module Metasploit3 { 'Offsets' => { - 'LPORT' => [ 226, 'n' ], + 'LPORT' => [ 214, 'n' ], }, 'Payload' => [ @@ -110,8 +110,6 @@ module Metasploit3 # Transmit our intermediate stager conn.put( [ payload.length ].pack(address_format) ) - Rex::ThreadSafe.sleep(0.5) - return true end diff --git a/modules/payloads/stagers/linux/armle/reverse_tcp.rb b/modules/payloads/stagers/linux/armle/reverse_tcp.rb index 3fa9a6db90..0a1467c765 100644 --- a/modules/payloads/stagers/linux/armle/reverse_tcp.rb +++ b/modules/payloads/stagers/linux/armle/reverse_tcp.rb @@ -103,8 +103,6 @@ def handle_intermediate_stage(conn, payload) # Transmit our intermediate stager conn.put( [ payload.length ].pack(address_format) ) - Rex::ThreadSafe.sleep(0.5) - return true end