48 lines
1.3 KiB
Diff
48 lines
1.3 KiB
Diff
From eebb592523672ee7288b9327bd222165db638d1a Mon Sep 17 00:00:00 2001
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From: Carlo Caione <carlo@caione.org>
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Date: Thu, 27 Feb 2014 20:34:21 +0100
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Subject: [PATCH] ARM: sun7i/sun6i: dts: Add NMI irqchip support
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This patch adds DTS entries for NMI controller as child of GIC.
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Signed-off-by: Carlo Caione <carlo@caione.org>
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---
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arch/arm/boot/dts/sun6i-a31.dtsi | 8 ++++++++
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arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
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2 files changed, 16 insertions(+)
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--- a/arch/arm/boot/dts/sun6i-a31.dtsi
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+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
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@@ -370,6 +370,14 @@
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interrupts = <1 9 0xf04>;
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};
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+ nmi_intc: interrupt-controller@01f00c0c {
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+ compatible = "allwinner,sun6i-a31-sc-nmi";
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ reg = <0x01f00c0c 0x38>;
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+ interrupts = <0 32 4>;
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+ };
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+
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cpucfg@01f01c00 {
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compatible = "allwinner,sun6i-a31-cpuconfig";
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reg = <0x01f01c00 0x300>;
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--- a/arch/arm/boot/dts/sun7i-a20.dtsi
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+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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@@ -401,6 +401,14 @@
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#size-cells = <1>;
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ranges;
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+ nmi_intc: interrupt-controller@01c00030 {
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+ compatible = "allwinner,sun7i-a20-sc-nmi";
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ reg = <0x01c00030 0x0c>;
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+ interrupts = <0 0 4>;
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+ };
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+
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spi0: spi@01c05000 {
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compatible = "allwinner,sun4i-a10-spi";
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reg = <0x01c05000 0x1000>;
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