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wifipineapple-openwrt
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wifipineapple-openwrt/target/linux/brcm63xx/patches-3.1/180-udc_preliminary_support...

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--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -29,6 +29,7 @@
#include <bcm63xx_dev_pcmcia.h>
#include <bcm63xx_dev_usb_ohci.h>
#include <bcm63xx_dev_usb_ehci.h>
+#include <bcm63xx_dev_usb_udc.h>
#include <board_bcm963xx.h>
#define PFX "board_bcm963xx: "
@@ -400,6 +401,8 @@ static struct board_info __initdata boar
.has_ohci0 = 1,
.has_pccard = 1,
.has_ehci0 = 1,
+
+ .has_udc0 = 1,
};
static struct board_info __initdata board_rta1025w_16 = {
@@ -911,6 +914,9 @@ int __init board_register_devices(void)
if (board.has_dsp)
bcm63xx_dsp_register(&board.dsp);
+ if (board.has_udc0)
+ bcm63xx_udc_register();
+
/* read base address of boot chip select (0) */
val = bcm_mpi_readl(MPI_CSBASE_REG(0));
val &= MPI_CSBASE_BASE_MASK;
--- /dev/null
+++ b/arch/mips/bcm63xx/dev-usb-udc.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2009 Henk Vergonet <Henk.Vergonet@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <bcm63xx_cpu.h>
+
+static struct resource udc_resources[] = {
+ {
+ .start = -1, /* filled at runtime */
+ .end = -1, /* filled at runtime */
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = -1, /* filled at runtime */
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 udc_dmamask = ~(u32)0;
+
+static struct platform_device bcm63xx_udc_device = {
+ .name = "bcm63xx-udc",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(udc_resources),
+ .resource = udc_resources,
+ .dev = {
+ .dma_mask = &udc_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+};
+
+int __init bcm63xx_udc_register(void)
+{
+ if (!BCMCPU_IS_6338() && !BCMCPU_IS_6345() && !BCMCPU_IS_6348())
+ return 0;
+
+ udc_resources[0].start = bcm63xx_regset_address(RSET_UDC0);
+ udc_resources[0].end = udc_resources[0].start;
+ udc_resources[0].end += RSET_UDC_SIZE - 1;
+ udc_resources[1].start = bcm63xx_get_irq_number(IRQ_UDC0);
+ return platform_device_register(&bcm63xx_udc_device);
+}
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -127,7 +127,7 @@ enum bcm63xx_regs_set {
#define BCM_6338_UART1_BASE (0xdeadbeef)
#define BCM_6338_GPIO_BASE (0xfffe0400)
#define BCM_6338_SPI_BASE (0xfffe0c00)
-#define BCM_6338_UDC0_BASE (0xdeadbeef)
+#define BCM_6338_UDC0_BASE (0xfffe3000)
#define BCM_6338_USBDMA_BASE (0xfffe2400)
#define BCM_6338_OHCI0_BASE (0xdeadbeef)
#define BCM_6338_OHCI_PRIV_BASE (0xfffe3000)
@@ -158,7 +158,7 @@ enum bcm63xx_regs_set {
#define BCM_6345_UART1_BASE (0xdeadbeef)
#define BCM_6345_GPIO_BASE (0xfffe0400)
#define BCM_6345_SPI_BASE (0xdeadbeef)
-#define BCM_6345_UDC0_BASE (0xdeadbeef)
+#define BCM_6345_UDC0_BASE (0xfffe2100)
#define BCM_6345_USBDMA_BASE (0xfffe2800)
#define BCM_6345_ENET0_BASE (0xfffe1800)
#define BCM_6345_ENETDMA_BASE (0xfffe2800)
@@ -215,7 +215,7 @@ enum bcm63xx_regs_set {
#define BCM_6358_UART1_BASE (0xfffe0120)
#define BCM_6358_GPIO_BASE (0xfffe0080)
#define BCM_6358_SPI_BASE (0xdeadbeef)
-#define BCM_6358_UDC0_BASE (0xfffe0800)
+#define BCM_6358_UDC0_BASE (0xfffe0400)
#define BCM_6358_OHCI0_BASE (0xfffe1400)
#define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef)
#define BCM_6358_USBH_PRIV_BASE (0xfffe1500)
@@ -444,6 +444,7 @@ enum bcm63xx_irq {
IRQ_UART0,
IRQ_UART1,
IRQ_DSL,
+ IRQ_UDC0,
IRQ_ENET0,
IRQ_ENET1,
IRQ_ENET_PHY,
@@ -486,7 +487,7 @@ enum bcm63xx_irq {
#define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
#define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3)
#define BCM_6345_ATM_IRQ (IRQ_INTERNAL_BASE + 4)
-#define BCM_6345_USB_IRQ (IRQ_INTERNAL_BASE + 5)
+#define BCM_6345_UDC0_IRQ (IRQ_INTERNAL_BASE + 5)
#define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
#define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
#define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1)
@@ -508,10 +509,17 @@ enum bcm63xx_irq {
#define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
#define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
#define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
+#define BCM_6348_UDC0_IRQ (IRQ_INTERNAL_BASE + 6)
#define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7)
#define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
#define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
#define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12)
+#define BCM_6348_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 14)
+#define BCM_6348_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 15)
+#define BCM_6348_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 16)
+#define BCM_6348_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 17)
+#define BCM_6348_USB_ISO_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 18)
+#define BCM_6348_USB_ISO_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 19)
#define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20)
#define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21)
#define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22)
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_udc.h
@@ -0,0 +1,6 @@
+#ifndef BCM63XX_DEV_USB_UDC_H_
+#define BCM63XX_DEV_USB_UDC_H_
+
+int bcm63xx_udc_register(void);
+
+#endif /* BCM63XX_DEV_USB_UDC_H_ */
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -47,6 +47,7 @@ struct board_info {
unsigned int has_dsp:1;
unsigned int has_uart0:1;
unsigned int has_uart1:1;
+ unsigned int has_udc0:1;
/* ethernet config */
struct bcm63xx_enet_platform_data enet0;
--- a/arch/mips/bcm63xx/Makefile
+++ b/arch/mips/bcm63xx/Makefile
@@ -1,6 +1,6 @@
obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \
- dev-usb-ohci.o dev-usb-ehci.o
+ dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-y += boards/
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -141,6 +141,30 @@ static struct clk clk_usbh = {
};
/*
+ * USB slave clock
+ */
+static void usbs_set(struct clk *clk, int enable)
+{
+ u32 mask;
+
+ switch(bcm63xx_get_cpu_id()) {
+ case BCM6338_CPU_ID:
+ mask = CKCTL_6338_USBS_EN;
+ break;
+ case BCM6348_CPU_ID:
+ mask = CKCTL_6348_USBS_EN;
+ break;
+ default:
+ return;
+ }
+ bcm_hwclock_set(mask, enable);
+}
+
+static struct clk clk_usbs = {
+ .set = usbs_set,
+};
+
+/*
* SPI clock
*/
static void spi_set(struct clk *clk, int enable)
@@ -208,6 +232,8 @@ struct clk *clk_get(struct device *dev,
return &clk_ephy;
if (!strcmp(id, "usbh"))
return &clk_usbh;
+ if (!strcmp(id, "usbs"))
+ return &clk_usbs;
if (!strcmp(id, "spi"))
return &clk_spi;
if (!strcmp(id, "periph"))
--- a/arch/mips/bcm63xx/Kconfig
+++ b/arch/mips/bcm63xx/Kconfig
@@ -7,6 +7,7 @@ config BCM63XX_CPU_6338
select USB_ARCH_HAS_OHCI
select USB_OHCI_BIG_ENDIAN_DESC
select USB_OHCI_BIG_ENDIAN_MMIO
+ select USB_ARCH_HAS_UDC
config BCM63XX_CPU_6345
bool "support 6345 CPU"
@@ -19,6 +20,7 @@ config BCM63XX_CPU_6348
select USB_ARCH_HAS_OHCI
select USB_OHCI_BIG_ENDIAN_DESC
select USB_OHCI_BIG_ENDIAN_MMIO
+ select USB_ARCH_HAS_UDC
config BCM63XX_CPU_6358
bool "support 6358 CPU"
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