265 lines
7.5 KiB
Diff
265 lines
7.5 KiB
Diff
From 66b56aa3a4810f10e0b0c77bb87279a8d64b566b Mon Sep 17 00:00:00 2001
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From: Luka Perkov <luka@openwrt.org>
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Date: Fri, 16 Dec 2011 11:55:45 +0100
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Subject: MIPS: add board support for Gigaset SX76X
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Signed-off-by: Luka Perkov <luka@openwrt.org>
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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--- /dev/null
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+++ b/board/gigaset/sx76x/Makefile
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@@ -0,0 +1,29 @@
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+#
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+# This file is released under the terms of GPL v2 and any later version.
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+# See the file COPYING in the root directory of the source tree for details.
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+#
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+# Copyright (C) 2000-2011 Wolfgang Denk, DENX Software Engineering, wd@denx.de
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+# Copyright (C) 2011 Daniel Schwierzeck, daniel.schwierzeck@googlemail.com
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+#
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+
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+include $(TOPDIR)/config.mk
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+
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+LIB = $(obj)lib$(BOARD).o
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+
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+COBJS = $(BOARD).o
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+
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+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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+OBJS := $(addprefix $(obj),$(COBJS))
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+SOBJS := $(addprefix $(obj),$(SOBJS))
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+
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+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
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+
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+#########################################################################
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+
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+# defines $(obj).depend target
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+include $(SRCTREE)/rules.mk
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+
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+sinclude $(obj).depend
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+
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+#########################################################################
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--- /dev/null
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+++ b/board/gigaset/sx76x/config.mk
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@@ -0,0 +1,8 @@
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+#
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+# This file is released under the terms of GPL v2 and any later version.
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+# See the file COPYING in the root directory of the source tree for details.
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+#
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+# Copyright (C) 2011 Daniel Schwierzeck, daniel.schwierzeck@googlemail.com
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+#
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+
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+PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARDDIR)
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--- /dev/null
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+++ b/board/gigaset/sx76x/ddr_settings.h
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@@ -0,0 +1,56 @@
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+/*
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+ * This file is released under the terms of GPL v2 and any later version.
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+ * See the file COPYING in the root directory of the source tree for details.
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+ *
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+ * generated with lantiq_ram_extract_magic.awk
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+ *
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+ * Copyright (C) 2011 Luka Perkov <luka@openwrt.org>
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+ */
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+
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+#define MC_DC00_VALUE 0x1B1B
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+#define MC_DC01_VALUE 0x0
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+#define MC_DC02_VALUE 0x0
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+#define MC_DC03_VALUE 0x0
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+#define MC_DC04_VALUE 0x0
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+#define MC_DC05_VALUE 0x200
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+#define MC_DC06_VALUE 0x605
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+#define MC_DC07_VALUE 0x303
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+#define MC_DC08_VALUE 0x202
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+#define MC_DC09_VALUE 0x70A
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+#define MC_DC10_VALUE 0x203
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+#define MC_DC11_VALUE 0xC02
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+#define MC_DC12_VALUE 0x1C8
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+#define MC_DC13_VALUE 0x1
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+#define MC_DC14_VALUE 0x0
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+#define MC_DC15_VALUE 0xF3E
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+#define MC_DC16_VALUE 0xC800
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+#define MC_DC17_VALUE 0xD
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+#define MC_DC18_VALUE 0x300
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+#define MC_DC19_VALUE 0x200
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+#define MC_DC20_VALUE 0xA04
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+#define MC_DC21_VALUE 0xF00
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+#define MC_DC22_VALUE 0xF0F
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+#define MC_DC23_VALUE 0x0
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+#define MC_DC24_VALUE 0x63
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+#define MC_DC25_VALUE 0x0
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+#define MC_DC26_VALUE 0x100
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+#define MC_DC27_VALUE 0x0
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+#define MC_DC28_VALUE 0x514
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+#define MC_DC29_VALUE 0x2D89
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+#define MC_DC30_VALUE 0x8300
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+#define MC_DC31_VALUE 0x2002
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+#define MC_DC32_VALUE 0x0
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+#define MC_DC33_VALUE 0x0
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+#define MC_DC34_VALUE 0x0
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+#define MC_DC35_VALUE 0x0
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+#define MC_DC36_VALUE 0x0
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+#define MC_DC37_VALUE 0x0
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+#define MC_DC38_VALUE 0x0
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+#define MC_DC39_VALUE 0x0
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+#define MC_DC40_VALUE 0x0
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+#define MC_DC41_VALUE 0x0
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+#define MC_DC42_VALUE 0x0
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+#define MC_DC43_VALUE 0x0
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+#define MC_DC44_VALUE 0x0
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+#define MC_DC45_VALUE 0x500
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+#define MC_DC46_VALUE 0x0
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--- /dev/null
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+++ b/board/gigaset/sx76x/sx76x.c
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@@ -0,0 +1,66 @@
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+/*
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+ * This file is released under the terms of GPL v2 and any later version.
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+ * See the file COPYING in the root directory of the source tree for details.
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+ *
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+ * Copyright (C) 2011 Luka Perkov <luka@openwrt.org>
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+ */
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+
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+#include <common.h>
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+#include <switch.h>
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+#include <asm/gpio.h>
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+#include <asm/lantiq/eth.h>
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+#include <asm/lantiq/reset.h>
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+#include <asm/lantiq/chipid.h>
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+
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+static void gpio_init(void)
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+{
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+ /* Activate reset line of ADM6996I switch */
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+ gpio_direction_output(19, 0);
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+}
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+
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+int board_early_init_f(void)
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+{
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+ gpio_init();
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+
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+ return 0;
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+}
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+
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+int checkboard(void)
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+{
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+ puts("Board: " CONFIG_BOARD_NAME "\n");
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+ ltq_chip_print_info();
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+
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+ return 0;
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+}
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+
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+static const struct ltq_eth_port_config eth_port_config[] = {
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+ /* MAC0: Lantiq ADM6996I switch */
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+ { 0, 0x0, LTQ_ETH_PORT_SWITCH, PHY_INTERFACE_MODE_RMII },
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+};
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+
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+static const struct ltq_eth_board_config eth_board_config = {
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+ .ports = eth_port_config,
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+ .num_ports = ARRAY_SIZE(eth_port_config),
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+};
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+
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+int board_eth_init(bd_t *bis)
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+{
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+ return ltq_eth_initialize(ð_board_config);
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+}
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+
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+static struct switch_device adm6996i_dev = {
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+ .name = "adm6996i",
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+ .cpu_port = 5,
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+ .port_mask = 0xF,
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+};
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+
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+int board_switch_init(void)
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+{
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+ /* Deactivate reset line of ADM6996I switch */
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+ gpio_set_value(19, 1);
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+
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+ /* ADM6996I needs some time to come out of reset */
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+ __udelay(50000);
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+
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+ return switch_device_register(&adm6996i_dev);
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+}
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--- a/boards.cfg
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+++ b/boards.cfg
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@@ -447,6 +447,8 @@ pb1000 mips
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easy50712_nor mips mips32 easy50712 lantiq danube easy50712:SYS_BOOT_NOR
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easy50712_norspl mips mips32 easy50712 lantiq danube easy50712:SYS_BOOT_NORSPL
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easy50712_ram mips mips32 easy50712 lantiq danube easy50712:SYS_BOOT_RAM
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+gigasx76x_nor mips mips32 sx76x gigaset danube sx76x:SYS_BOOT_NOR
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+gigasx76x_ram mips mips32 sx76x gigaset danube sx76x:SYS_BOOT_RAM
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incaip mips mips32 incaip - incaip
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incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000
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incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000
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--- /dev/null
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+++ b/include/configs/sx76x.h
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@@ -0,0 +1,71 @@
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+/*
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+ * This file is released under the terms of GPL v2 and any later version.
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+ * See the file COPYING in the root directory of the source tree for details.
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+ *
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+ * Copyright (C) 2011 Luka Perkov <luka@openwrt.org>
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+ */
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+
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+#ifndef __CONFIG_H
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+#define __CONFIG_H
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+
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+#define CONFIG_MACH_TYPE "GIGASX76X"
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+#define CONFIG_IDENT_STRING " sx76x"
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+#define CONFIG_BOARD_NAME "Gigaset sx76x"
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+
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+/* Configure SoC */
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+#define CONFIG_LTQ_SUPPORT_UART /* Enable ASC and UART */
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+
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+#define CONFIG_LTQ_SUPPORT_ETHERNET /* Enable ethernet */
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+
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+#define CONFIG_LTQ_SUPPORT_NOR_FLASH /* Have a parallel NOR flash */
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+
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+/* Switch devices */
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+#define CONFIG_SWITCH_MULTI
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+#define CONFIG_SWITCH_ADM6996I
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+
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+/* Environment */
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+#if defined(CONFIG_SYS_BOOT_NOR)
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+#define CONFIG_ENV_IS_IN_FLASH
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+#define CONFIG_ENV_OVERWRITE
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+#define CONFIG_ENV_OFFSET (256 * 1024)
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+#define CONFIG_ENV_SIZE (8 * 1024)
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+#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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+#else
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+#define CONFIG_ENV_IS_NOWHERE
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+#define CONFIG_ENV_SIZE (2 * 1024)
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+#endif
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+
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+#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
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+
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+/* Console */
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+#define CONFIG_LTQ_ADVANCED_CONSOLE
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+#define CONFIG_BAUDRATE 115200
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+#define CONFIG_CONSOLE_ASC 1
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+#define CONFIG_CONSOLE_DEV "ttyLTQ1"
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+
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+/* Commands */
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+#define CONFIG_CMD_PING
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+
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+/* Pull in default board configs for Lantiq XWAY Danube */
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+#include <asm/lantiq/config.h>
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+#include <asm/arch/config.h>
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+
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+/* Compression */
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+#define CONFIG_LZMA
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+
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+/* Auto boot */
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+#define CONFIG_BOOTDELAY 2
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+
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+/* Environment configuration */
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+#define CONFIG_BOOTCOMMAND \
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+ "run addeth; bootm ${kernel_addr}"
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+
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+#define CONFIG_ENV_UPDATE_UBOOT_NOR \
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+ "update-uboot-nor=run load-uboot-nor write-uboot-nor\0"
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+
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+#define CONFIG_EXTRA_ENV_SETTINGS \
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+ CONFIG_ENV_LANTIQ_DEFAULTS \
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+ CONFIG_ENV_UPDATE_UBOOT_NOR \
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+ "kernel_addr=0xB0040000\0"
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+
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+#endif /* __CONFIG_H */
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