79 lines
2.9 KiB
Diff
79 lines
2.9 KiB
Diff
--- a/drivers/net/ethernet/broadcom/bgmac.c
|
|
+++ b/drivers/net/ethernet/broadcom/bgmac.c
|
|
@@ -725,11 +725,9 @@ static void bgmac_phy_reset(struct bgmac
|
|
if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
|
|
return;
|
|
|
|
- bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL,
|
|
- BGMAC_PHY_CTL_RESET);
|
|
+ bgmac_phy_write(bgmac, bgmac->phyaddr, MII_BMCR, BMCR_RESET);
|
|
udelay(100);
|
|
- if (bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL) &
|
|
- BGMAC_PHY_CTL_RESET)
|
|
+ if (bgmac_phy_read(bgmac, bgmac->phyaddr, MII_BMCR) & BMCR_RESET)
|
|
bgmac_err(bgmac, "PHY reset failed\n");
|
|
bgmac_phy_init(bgmac);
|
|
}
|
|
@@ -1200,27 +1198,11 @@ static int bgmac_set_mac_address(struct
|
|
static int bgmac_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
|
|
{
|
|
struct bgmac *bgmac = netdev_priv(net_dev);
|
|
- struct mii_ioctl_data *data = if_mii(ifr);
|
|
|
|
- switch (cmd) {
|
|
- case SIOCGMIIPHY:
|
|
- data->phy_id = bgmac->phyaddr;
|
|
- /* fallthru */
|
|
- case SIOCGMIIREG:
|
|
- if (!netif_running(net_dev))
|
|
- return -EAGAIN;
|
|
- data->val_out = bgmac_phy_read(bgmac, data->phy_id,
|
|
- data->reg_num & 0x1f);
|
|
- return 0;
|
|
- case SIOCSMIIREG:
|
|
- if (!netif_running(net_dev))
|
|
- return -EAGAIN;
|
|
- bgmac_phy_write(bgmac, data->phy_id, data->reg_num & 0x1f,
|
|
- data->val_in);
|
|
- return 0;
|
|
- default:
|
|
- return -EOPNOTSUPP;
|
|
- }
|
|
+ if (!netif_running(net_dev))
|
|
+ return -EINVAL;
|
|
+
|
|
+ return phy_mii_ioctl(bgmac->phy_dev, ifr, cmd);
|
|
}
|
|
|
|
static const struct net_device_ops bgmac_netdev_ops = {
|
|
--- a/drivers/net/ethernet/broadcom/bgmac.h
|
|
+++ b/drivers/net/ethernet/broadcom/bgmac.h
|
|
@@ -220,27 +220,6 @@
|
|
#define BGMAC_RX_STATUS 0xb38
|
|
#define BGMAC_TX_STATUS 0xb3c
|
|
|
|
-#define BGMAC_PHY_CTL 0x00
|
|
-#define BGMAC_PHY_CTL_SPEED_MSB 0x0040
|
|
-#define BGMAC_PHY_CTL_DUPLEX 0x0100 /* duplex mode */
|
|
-#define BGMAC_PHY_CTL_RESTART 0x0200 /* restart autonegotiation */
|
|
-#define BGMAC_PHY_CTL_ANENAB 0x1000 /* enable autonegotiation */
|
|
-#define BGMAC_PHY_CTL_SPEED 0x2000
|
|
-#define BGMAC_PHY_CTL_LOOP 0x4000 /* loopback */
|
|
-#define BGMAC_PHY_CTL_RESET 0x8000 /* reset */
|
|
-/* Helpers */
|
|
-#define BGMAC_PHY_CTL_SPEED_10 0
|
|
-#define BGMAC_PHY_CTL_SPEED_100 BGMAC_PHY_CTL_SPEED
|
|
-#define BGMAC_PHY_CTL_SPEED_1000 BGMAC_PHY_CTL_SPEED_MSB
|
|
-#define BGMAC_PHY_ADV 0x04
|
|
-#define BGMAC_PHY_ADV_10HALF 0x0020 /* advertise 10MBits/s half duplex */
|
|
-#define BGMAC_PHY_ADV_10FULL 0x0040 /* advertise 10MBits/s full duplex */
|
|
-#define BGMAC_PHY_ADV_100HALF 0x0080 /* advertise 100MBits/s half duplex */
|
|
-#define BGMAC_PHY_ADV_100FULL 0x0100 /* advertise 100MBits/s full duplex */
|
|
-#define BGMAC_PHY_ADV2 0x09
|
|
-#define BGMAC_PHY_ADV2_1000HALF 0x0100 /* advertise 1000MBits/s half duplex */
|
|
-#define BGMAC_PHY_ADV2_1000FULL 0x0200 /* advertise 1000MBits/s full duplex */
|
|
-
|
|
/* BCMA GMAC core specific IO Control (BCMA_IOCTL) flags */
|
|
#define BGMAC_BCMA_IOCTL_SW_CLKEN 0x00000004 /* PHY Clock Enable */
|
|
#define BGMAC_BCMA_IOCTL_SW_RESET 0x00000008 /* PHY Reset */
|