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wifipineapple-openwrt/target/linux/ramips/patches-3.8/0079-clocksource-MIPS-ralin...

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From 4f3ae2a7ee1b1c9b9cab287c828f2ed7b1858495 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 20 Jun 2013 19:21:52 +0200
Subject: [PATCH 79/79] clocksource: MIPS: ralink: add support for systick
timer found on newer ralink SoC
Signed-off-by: John Crispin <blogic@openwrt.org
---
arch/mips/pci/Makefile.rej | 10 +++
arch/mips/ralink/Kconfig | 2 +
arch/mips/ralink/Kconfig.rej | 10 +++
arch/mips/ralink/clk.c | 1 +
drivers/clocksource/Kconfig | 6 ++
drivers/clocksource/Makefile | 1 +
drivers/clocksource/cevt-rt3352.c | 162 +++++++++++++++++++++++++++++++++++++
7 files changed, 192 insertions(+)
create mode 100644 arch/mips/pci/Makefile.rej
create mode 100644 arch/mips/ralink/Kconfig.rej
create mode 100644 drivers/clocksource/cevt-rt3352.c
diff --git a/arch/mips/pci/Makefile.rej b/arch/mips/pci/Makefile.rej
new file mode 100644
index 0000000..c5761e8
--- /dev/null
+++ b/arch/mips/pci/Makefile.rej
@@ -0,0 +1,10 @@
+--- arch/mips/pci/Makefile
++++ arch/mips/pci/Makefile
+@@ -43,6 +43,7 @@
+ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o
+ obj-$(CONFIG_SOC_RT2880) += pci-rt2880.o
+ obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
++obj-$(CONFIG_SOC_MT7620) += pci-mt7620a.o
+ obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
+ obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
+ obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index f89fdf8..c8d5b6c 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -15,6 +15,7 @@ choice
select USB_ARCH_HAS_HCD
select USB_ARCH_HAS_OHCI
select USB_ARCH_HAS_EHCI
+ select CLKEVT_RT3352
config SOC_RT3883
bool "RT3883"
@@ -24,6 +25,7 @@ choice
config SOC_MT7620
bool "MT7620"
+ select CLKEVT_RT3352
select HW_HAS_PCI
endchoice
diff --git a/arch/mips/ralink/Kconfig.rej b/arch/mips/ralink/Kconfig.rej
new file mode 100644
index 0000000..d3a804f
--- /dev/null
+++ b/arch/mips/ralink/Kconfig.rej
@@ -0,0 +1,10 @@
+--- arch/mips/ralink/Kconfig
++++ arch/mips/ralink/Kconfig
+@@ -23,6 +24,7 @@
+
+ config SOC_MT7620
+ bool "MT7620"
++ select CLKEVT_RT3352
+
+ endchoice
+
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
index 8dfa22f..bba0cdf 100644
--- a/arch/mips/ralink/clk.c
+++ b/arch/mips/ralink/clk.c
@@ -69,4 +69,5 @@ void __init plat_time_init(void)
pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
mips_hpt_frequency = clk_get_rate(clk) / 2;
clk_put(clk);
+ clocksource_of_init();
}
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a32b7a9..90bed1a 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -7,6 +7,12 @@ config CLKSRC_I8253
config CLKEVT_I8253
bool
+config CLKEVT_RT3352
+ bool
+ depends on MIPS && RALINK
+ select CLKSRC_OF
+ select CLKSRC_MMIO
+
config I8253_LOCK
bool
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index a33f792..5031f82 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o
obj-$(CONFIG_EM_TIMER_STI) += em_sti.o
obj-$(CONFIG_CLKBLD_I8253) += i8253.o
obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
+obj-$(CONFIG_CLKEVT_RT3352) += cevt-rt3352.o
obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o
diff --git a/drivers/clocksource/cevt-rt3352.c b/drivers/clocksource/cevt-rt3352.c
new file mode 100644
index 0000000..bd50edd
--- /dev/null
+++ b/drivers/clocksource/cevt-rt3352.c
@@ -0,0 +1,162 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2013 by John Crispin <blogic@openwrt.org>
+ */
+
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/interrupt.h>
+#include <linux/reset.h>
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+
+#include <asm/mach-ralink/ralink_regs.h>
+#include <asm/time.h>
+
+#define SYSTICK_FREQ (50 * 1000)
+
+#define SYSTICK_CONFIG 0x00
+#define SYSTICK_COMPARE 0x04
+#define SYSTICK_COUNT 0x08
+
+/* route systick irq to mips irq 7 instead of the r4k-timer */
+#define CFG_EXT_STK_EN 0x2
+/* enable the counter */
+#define CFG_CNT_EN 0x1
+
+struct systick_device {
+ void __iomem *membase;
+ struct clock_event_device dev;
+ int irq_requested;
+ int freq_scale;
+};
+
+static void systick_set_clock_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt);
+
+static int systick_next_event(unsigned long delta,
+ struct clock_event_device *evt)
+{
+ struct systick_device *sdev = container_of(evt, struct systick_device, dev);
+ u32 count;
+
+ count = ioread32(sdev->membase + SYSTICK_COUNT);
+ count = (count + delta) % SYSTICK_FREQ;
+ iowrite32(count + delta, sdev->membase + SYSTICK_COMPARE);
+
+ return 0;
+}
+
+static void systick_event_handler(struct clock_event_device *dev)
+{
+ /* noting to do here */
+}
+
+static irqreturn_t systick_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *dev = (struct clock_event_device *) dev_id;
+
+ dev->event_handler(dev);
+
+ return IRQ_HANDLED;
+}
+
+static struct systick_device systick = {
+ .dev = {
+ /* cevt-r4k uses 300, make sure systick gets used if available */
+ .rating = 310,
+ .features = CLOCK_EVT_FEAT_ONESHOT,
+ .set_next_event = systick_next_event,
+ .set_mode = systick_set_clock_mode,
+ .event_handler = systick_event_handler,
+ },
+};
+
+static struct irqaction systick_irqaction = {
+ .handler = systick_interrupt,
+ .flags = IRQF_PERCPU | IRQF_TIMER,
+ .dev_id = &systick.dev,
+};
+
+/* ugly hack */
+#ifdef CONFIG_SOC_MT7620
+
+#define CLK_LUT_CFG 0x40
+#define SLEEP_EN BIT(31)
+
+static inline void mt7620_freq_scaling(struct systick_device *sdev, int status)
+{
+ if (sdev->freq_scale == status)
+ return;
+
+ sdev->freq_scale = status;
+
+ pr_info("%s: %s autosleep mode\n", systick.dev.name, (status) ? ("enable") : ("disable"));
+ if (status)
+ rt_sysc_w32(rt_sysc_r32(CLK_LUT_CFG) | SLEEP_EN, CLK_LUT_CFG);
+ else
+ rt_sysc_w32(rt_sysc_r32(CLK_LUT_CFG) & ~SLEEP_EN, CLK_LUT_CFG);
+}
+#else
+static inline void mt7620_freq_scaling(struct systick_device *sdev, int status) {}
+#endif
+
+static void systick_set_clock_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt)
+{
+ struct systick_device *sdev = container_of(evt, struct systick_device, dev);
+
+ switch (mode) {
+ case CLOCK_EVT_MODE_ONESHOT:
+ if (!sdev->irq_requested)
+ setup_irq(systick.dev.irq, &systick_irqaction);
+ mt7620_freq_scaling(sdev, 1);
+ sdev->irq_requested = 1;
+ iowrite32(CFG_EXT_STK_EN | CFG_CNT_EN, systick.membase + SYSTICK_CONFIG);
+ break;
+
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ if (sdev->irq_requested)
+ free_irq(systick.dev.irq, &systick_irqaction);
+ mt7620_freq_scaling(sdev, 0);
+ sdev->irq_requested = 0;
+ iowrite32(0, systick.membase + SYSTICK_CONFIG);
+ break;
+
+ default:
+ pr_err("%s: Unhandeled mips clock_mode\n", systick.dev.name);
+ break;
+ }
+}
+
+static void __init ralink_systick_init(struct device_node *np)
+{
+ systick.membase = of_iomap(np, 0);
+ if (!systick.membase) {
+ pr_err("%s: of_iomap failed", np->name);
+ return;
+ }
+
+ clocksource_mmio_init(systick.membase + SYSTICK_COUNT, np->name,
+ SYSTICK_FREQ, 301, 16, clocksource_mmio_readl_up);
+
+ systick_irqaction.name = np->name;
+ systick.dev.name = np->name;
+ clockevent_set_clock(&systick.dev, SYSTICK_FREQ);
+ systick.dev.max_delta_ns = clockevent_delta2ns(0x7fff, &systick.dev);
+ systick.dev.min_delta_ns = clockevent_delta2ns(0x3, &systick.dev);
+ systick.dev.irq = irq_of_parse_and_map(np, 0);
+ if (!systick.dev.irq)
+ panic("%s: request_irq failed", np->name);
+
+ clockevents_register_device(&systick.dev);
+
+ pr_info("%s: runing - mult: %d, shift: %d\n", np->name, systick.dev.mult, systick.dev.shift);
+}
+
+CLOCKSOURCE_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);
--
1.7.10.4
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