wifipineapple-openwrt/target
Nicolas Thill 72697abd46 disable dsp freq use for vlynq bus clock init, disable external clocking (it locks up on c54apra2+) and revert to internal clocking trying various clock divisors.
cleanup:
 * remove volative and use readl & writel accessors instead
 * use set_irq_chip & friends for irq setup
 * use kzalloc instead of kmalloc
 * secure VINT_VECTOR macro argument
 * remove unused vlynq_local_id function



git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8750 3c298f89-4303-0410-b956-a3cf2f4a3e73
2007-09-11 14:50:43 +00:00
..
imagebuilder Fix the imagebuilder generation (does not mean it works with the recent changes) 2007-09-09 15:09:10 +00:00
linux disable dsp freq use for vlynq bus clock init, disable external clocking (it locks up on c54apra2+) and revert to internal clocking trying various clock divisors. 2007-09-11 14:50:43 +00:00
sdk Fix the sdk generation with the new staging_dir layout 2007-08-27 10:31:12 +00:00
Config.in more dependency fixes 2007-07-23 02:41:33 +00:00
Makefile fix a dependency bug 2007-08-30 22:43:25 +00:00