162 lines
4.5 KiB
Diff
162 lines
4.5 KiB
Diff
From 67a9d5a02b178644da624ef9c32b4e6abb2c4f6e Mon Sep 17 00:00:00 2001
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From: Stephen Boyd <sboyd@codeaurora.org>
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Date: Wed, 18 Jun 2014 14:25:41 -0700
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Subject: [PATCH 170/182] clk: qcom: Add KPSS ACC/GCC driver
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The ACC and GCC regions present in KPSSv1 contain registers to
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control clocks and power to each Krait CPU and L2. For CPUfreq
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purposes probe these devices and expose a mux clock that chooses
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between PXO and PLL8.
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Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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---
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drivers/clk/qcom/Kconfig | 8 +++
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drivers/clk/qcom/Makefile | 1 +
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drivers/clk/qcom/kpss-xcc.c | 115 +++++++++++++++++++++++++++++++++++++++++++
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3 files changed, 124 insertions(+)
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create mode 100644 drivers/clk/qcom/kpss-xcc.c
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--- a/drivers/clk/qcom/Kconfig
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+++ b/drivers/clk/qcom/Kconfig
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@@ -62,6 +62,14 @@ config QCOM_HFPLL
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Say Y if you want to support CPU frequency scaling on devices
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such as MSM8974, APQ8084, etc.
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+config KPSS_XCC
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+ tristate "KPSS Clock Controller"
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+ depends on COMMON_CLK_QCOM
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+ help
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+ Support for the Krait ACC and GCC clock controllers. Say Y
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+ if you want to support CPU frequency scaling on devices such
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+ as MSM8960, APQ8064, etc.
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+
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config KRAIT_CLOCKS
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bool
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select KRAIT_L2_ACCESSORS
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--- a/drivers/clk/qcom/Makefile
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+++ b/drivers/clk/qcom/Makefile
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@@ -17,4 +17,5 @@ obj-$(CONFIG_MSM_GCC_8960) += gcc-msm896
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obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
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obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
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obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
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+obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
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obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
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--- /dev/null
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+++ b/drivers/clk/qcom/kpss-xcc.c
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@@ -0,0 +1,115 @@
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+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 and
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+ * only version 2 as published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/of.h>
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+#include <linux/of_device.h>
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+#include <linux/clk.h>
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+#include <linux/clk-provider.h>
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+#include <linux/clk/msm-clk-generic.h>
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+
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+static int kpss_xcc_set_mux_sel(struct mux_clk *clk, int sel)
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+{
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+ writel_relaxed(sel, clk->base + clk->offset);
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+ return 0;
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+}
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+
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+static int kpss_xcc_get_mux_sel(struct mux_clk *clk)
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+{
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+ return readl_relaxed(clk->base + clk->offset);
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+}
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+
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+static const struct clk_mux_ops kpss_xcc_ops = {
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+ .set_mux_sel = kpss_xcc_set_mux_sel,
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+ .get_mux_sel = kpss_xcc_get_mux_sel,
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+};
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+
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+static const char *aux_parents[] = {
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+ "pll8_vote",
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+ "pxo",
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+};
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+
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+static u8 aux_parent_map[] = {
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+ 3,
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+ 0,
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+};
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+
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+static const struct of_device_id kpss_xcc_match_table[] = {
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+ { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
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+ { .compatible = "qcom,kpss-gcc" },
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+ {}
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+};
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+MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
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+
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+static int kpss_xcc_driver_probe(struct platform_device *pdev)
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+{
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+ const struct of_device_id *id;
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+ struct clk *clk;
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+ struct resource *res;
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+ void __iomem *base;
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+ struct mux_clk *mux_clk;
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+ struct clk_init_data init = {
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+ .parent_names = aux_parents,
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+ .num_parents = 2,
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+ .ops = &clk_ops_gen_mux,
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+ };
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+
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+ id = of_match_device(kpss_xcc_match_table, &pdev->dev);
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+ if (!id)
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+ return -ENODEV;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ base = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(base))
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+ return PTR_ERR(base);
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+
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+ mux_clk = devm_kzalloc(&pdev->dev, sizeof(*mux_clk), GFP_KERNEL);
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+ if (!mux_clk)
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+ return -ENOMEM;
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+
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+ mux_clk->mask = 0x3;
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+ mux_clk->parent_map = aux_parent_map;
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+ mux_clk->ops = &kpss_xcc_ops;
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+ mux_clk->base = base;
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+ mux_clk->hw.init = &init;
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+
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+ if (id->data) {
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+ if (of_property_read_string_index(pdev->dev.of_node,
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+ "clock-output-names", 0, &init.name))
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+ return -ENODEV;
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+ mux_clk->offset = 0x14;
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+ } else {
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+ init.name = "acpu_l2_aux";
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+ mux_clk->offset = 0x28;
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+ }
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+
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+ clk = devm_clk_register(&pdev->dev, &mux_clk->hw);
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+
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+ return PTR_ERR_OR_ZERO(clk);
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+}
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+
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+static struct platform_driver kpss_xcc_driver = {
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+ .probe = kpss_xcc_driver_probe,
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+ .driver = {
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+ .name = "kpss-xcc",
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+ .of_match_table = kpss_xcc_match_table,
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+ .owner = THIS_MODULE,
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+ },
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+};
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+module_platform_driver(kpss_xcc_driver);
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+
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+MODULE_LICENSE("GPL v2");
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