388 lines
10 KiB
Diff
388 lines
10 KiB
Diff
--- a/arch/arm/configs/ixp4xx_defconfig
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+++ b/arch/arm/configs/ixp4xx_defconfig
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@@ -157,6 +157,8 @@ CONFIG_ARCH_ADI_COYOTE=y
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CONFIG_MACH_GATEWAY7001=y
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CONFIG_MACH_WG302V1=y
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CONFIG_MACH_WG302V2=y
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+CONFIG_MACH_PRONGHORN=y
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+CONFIG_MACH_PRONGHORNMETRO=y
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CONFIG_ARCH_IXDP425=y
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CONFIG_MACH_IXDPG425=y
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CONFIG_MACH_IXDP465=y
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--- a/arch/arm/mach-ixp4xx/Kconfig
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+++ b/arch/arm/mach-ixp4xx/Kconfig
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@@ -65,6 +65,22 @@ config MACH_WG302V2
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WG302 v2 or WAG302 v2 Access Points. For more information
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on this platform, see http://openwrt.org
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+config MACH_PRONGHORN
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+ bool "ADI Pronghorn series"
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+ select PCI
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+ help
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+ Say 'Y' here if you want your kernel to support the ADI
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+ Engineering Pronghorn series. For more
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+ information on this platform, see http://www.adiengineering.com
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+
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+#
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+# There're only minimal differences kernel-wise between the Pronghorn and
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+# Pronghorn Metro boards - they use different chip selects to drive the
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+# CF slot connected to the expansion bus, so we just enable them together.
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+#
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+config MACH_PRONGHORNMETRO
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+ def_bool MACH_PRONGHORN
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+
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config ARCH_IXDP425
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bool "IXDP425"
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help
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--- a/arch/arm/mach-ixp4xx/Makefile
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+++ b/arch/arm/mach-ixp4xx/Makefile
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@@ -17,6 +17,7 @@ obj-pci-$(CONFIG_MACH_GATEWAY7001) += ga
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obj-pci-$(CONFIG_MACH_WG302V1) += wg302v1-pci.o
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obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
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obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
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+obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o
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obj-y += common.o
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@@ -32,6 +33,7 @@ obj-$(CONFIG_MACH_GATEWAY7001) += gatewa
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obj-$(CONFIG_MACH_WG302V1) += wg302v1-setup.o
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obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
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obj-$(CONFIG_MACH_FSG) += fsg-setup.o
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+obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o
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obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
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obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
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--- /dev/null
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+++ b/arch/arm/mach-ixp4xx/pronghorn-pci.c
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@@ -0,0 +1,70 @@
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+/*
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+ * arch/arch/mach-ixp4xx/pronghorn-pci.c
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+ *
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+ * PCI setup routines for ADI Engineering Pronghorn series
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+ *
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+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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+ *
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+ * based on coyote-pci.c:
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+ * Copyright (C) 2002 Jungo Software Technologies.
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+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
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+ *
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+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/pci.h>
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+#include <linux/init.h>
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+#include <linux/irq.h>
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+
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+#include <asm/mach-types.h>
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+#include <mach/hardware.h>
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+
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+#include <asm/mach/pci.h>
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+
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+void __init pronghorn_pci_preinit(void)
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+{
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+ set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_LEVEL_LOW);
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+ set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW);
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+ set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW);
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+ set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_LEVEL_LOW);
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+
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+ ixp4xx_pci_preinit();
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+}
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+
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+static int __init pronghorn_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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+{
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+ if (slot == 13)
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+ return IRQ_IXP4XX_GPIO4;
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+ else if (slot == 14)
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+ return IRQ_IXP4XX_GPIO6;
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+ else if (slot == 15)
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+ return IRQ_IXP4XX_GPIO11;
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+ else if (slot == 16)
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+ return IRQ_IXP4XX_GPIO1;
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+ else
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+ return -1;
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+}
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+
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+struct hw_pci pronghorn_pci __initdata = {
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+ .nr_controllers = 1,
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+ .preinit = pronghorn_pci_preinit,
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+ .swizzle = pci_std_swizzle,
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+ .setup = ixp4xx_setup,
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+ .scan = ixp4xx_scan_bus,
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+ .map_irq = pronghorn_map_irq,
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+};
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+
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+int __init pronghorn_pci_init(void)
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+{
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+ if (machine_is_pronghorn() || machine_is_pronghorn_metro())
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+ pci_common_init(&pronghorn_pci);
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+ return 0;
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+}
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+
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+subsys_initcall(pronghorn_pci_init);
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--- /dev/null
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+++ b/arch/arm/mach-ixp4xx/pronghorn-setup.c
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@@ -0,0 +1,245 @@
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+/*
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+ * arch/arm/mach-ixp4xx/pronghorn-setup.c
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+ *
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+ * Board setup for the ADI Engineering Pronghorn series
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+ *
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+ * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
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+ *
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+ * based on coyote-setup.c:
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+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
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+ *
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+ * Author: Imre Kaloz <Kaloz@openwrt.org>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/device.h>
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+#include <linux/serial.h>
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+#include <linux/tty.h>
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+#include <linux/serial_8250.h>
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+#include <linux/slab.h>
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+#include <linux/types.h>
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+#include <linux/memory.h>
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+#include <linux/i2c-gpio.h>
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+#include <linux/leds.h>
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+
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+#include <asm/setup.h>
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+#include <mach/hardware.h>
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+#include <asm/irq.h>
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+#include <asm/mach-types.h>
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+#include <asm/mach/arch.h>
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+#include <asm/mach/flash.h>
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+
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+static struct flash_platform_data pronghorn_flash_data = {
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+ .map_name = "cfi_probe",
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+ .width = 2,
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+};
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+
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+static struct resource pronghorn_flash_resource = {
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+ .flags = IORESOURCE_MEM,
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+};
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+
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+static struct platform_device pronghorn_flash = {
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+ .name = "IXP4XX-Flash",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &pronghorn_flash_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &pronghorn_flash_resource,
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+};
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+
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+static struct resource pronghorn_uart_resources [] = {
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+ {
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+ .start = IXP4XX_UART1_BASE_PHYS,
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+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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+ .flags = IORESOURCE_MEM
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+ },
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+ {
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+ .start = IXP4XX_UART2_BASE_PHYS,
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+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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+ .flags = IORESOURCE_MEM
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+ }
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+};
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+
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+static struct plat_serial8250_port pronghorn_uart_data[] = {
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+ {
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+ .mapbase = IXP4XX_UART1_BASE_PHYS,
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+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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+ .irq = IRQ_IXP4XX_UART1,
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+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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+ .iotype = UPIO_MEM,
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+ .regshift = 2,
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+ .uartclk = IXP4XX_UART_XTAL,
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+ },
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+ {
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+ .mapbase = IXP4XX_UART2_BASE_PHYS,
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+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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+ .irq = IRQ_IXP4XX_UART2,
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+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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+ .iotype = UPIO_MEM,
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+ .regshift = 2,
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+ .uartclk = IXP4XX_UART_XTAL,
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+ },
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+ { },
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+};
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+
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+static struct platform_device pronghorn_uart = {
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+ .name = "serial8250",
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+ .id = PLAT8250_DEV_PLATFORM,
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+ .dev = {
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+ .platform_data = pronghorn_uart_data,
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+ },
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+ .num_resources = 2,
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+ .resource = pronghorn_uart_resources,
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+};
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+
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+static struct i2c_gpio_platform_data pronghorn_i2c_gpio_data = {
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+ .sda_pin = 9,
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+ .scl_pin = 10,
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+};
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+
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+static struct platform_device pronghorn_i2c_gpio = {
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+ .name = "i2c-gpio",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &pronghorn_i2c_gpio_data,
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+ },
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+};
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+
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+static struct gpio_led pronghorn_led_pin[] = {
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+ {
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+ .name = "pronghorn:green:status",
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+ .gpio = 7,
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+ }
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+};
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+
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+static struct gpio_led_platform_data pronghorn_led_data = {
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+ .num_leds = 1,
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+ .leds = pronghorn_led_pin,
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+};
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+
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+static struct platform_device pronghorn_led = {
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+ .name = "leds-gpio",
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+ .id = -1,
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+ .dev.platform_data = &pronghorn_led_data,
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+};
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+
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+static struct resource pronghorn_pata_resources[] = {
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+ {
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+ .flags = IORESOURCE_MEM
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+ },
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+ {
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .name = "intrq",
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+ .start = IRQ_IXP4XX_GPIO0,
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+ .end = IRQ_IXP4XX_GPIO0,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct ixp4xx_pata_data pronghorn_pata_data = {
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+ .cs0_bits = 0xbfff0043,
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+ .cs1_bits = 0xbfff0043,
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+};
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+
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+static struct platform_device pronghorn_pata = {
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+ .name = "pata_ixp4xx_cf",
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+ .id = 0,
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+ .dev.platform_data = &pronghorn_pata_data,
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+ .num_resources = ARRAY_SIZE(pronghorn_pata_resources),
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+ .resource = pronghorn_pata_resources,
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+};
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+
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+static struct eth_plat_info pronghorn_plat_eth[] = {
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+ {
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+ .phy = 0,
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+ .rxq = 3,
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+ .txreadyq = 20,
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+ }, {
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+ .phy = 1,
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+ .rxq = 4,
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+ .txreadyq = 21,
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+ }
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+};
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+
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+static struct platform_device pronghorn_eth[] = {
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+ {
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+ .name = "ixp4xx_eth",
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+ .id = IXP4XX_ETH_NPEB,
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+ .dev.platform_data = pronghorn_plat_eth,
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+ }, {
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+ .name = "ixp4xx_eth",
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+ .id = IXP4XX_ETH_NPEC,
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+ .dev.platform_data = pronghorn_plat_eth + 1,
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+ }
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+};
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+
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+static struct platform_device *pronghorn_devices[] __initdata = {
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+ &pronghorn_flash,
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+ &pronghorn_uart,
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+ &pronghorn_led,
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+ &pronghorn_eth[0],
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+ &pronghorn_eth[1],
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+};
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+
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+static void __init pronghorn_init(void)
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+{
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+ ixp4xx_sys_init();
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+
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+ pronghorn_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
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+ pronghorn_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
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+
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+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
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+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
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+
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+ platform_add_devices(pronghorn_devices, ARRAY_SIZE(pronghorn_devices));
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+
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+ if (machine_is_pronghorn()) {
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+ pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(2);
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+ pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(2);
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+
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+ pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(3);
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+ pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(3);
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+
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+ pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS2;
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+ pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
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+ } else {
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+ pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(3);
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+ pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(3);
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+
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+ pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(4);
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+ pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(4);
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+
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+ pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
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+ pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS4;
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+
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+ platform_device_register(&pronghorn_i2c_gpio);
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+ }
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+
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+ platform_device_register(&pronghorn_pata);
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+}
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+
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+MACHINE_START(PRONGHORN, "ADI Engineering Pronghorn")
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+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
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+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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+ .map_io = ixp4xx_map_io,
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+ .init_irq = ixp4xx_init_irq,
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+ .timer = &ixp4xx_timer,
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+ .boot_params = 0x0100,
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+ .init_machine = pronghorn_init,
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+MACHINE_END
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+
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+MACHINE_START(PRONGHORNMETRO, "ADI Engineering Pronghorn Metro")
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+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
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+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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+ .map_io = ixp4xx_map_io,
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+ .init_irq = ixp4xx_init_irq,
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+ .timer = &ixp4xx_timer,
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+ .boot_params = 0x0100,
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+ .init_machine = pronghorn_init,
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+MACHINE_END
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--- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h
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+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h
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@@ -41,7 +41,8 @@ static __inline__ void __arch_decomp_set
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* Some boards are using UART2 as console
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*/
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if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
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- machine_is_gateway7001() || machine_is_wg302v2())
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+ machine_is_gateway7001() || machine_is_wg302v2() ||
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+ machine_is_pronghorn() || machine_is_pronghorn_metro())
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uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
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else
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uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
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