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Commit Graph

Author	SHA1	Message	Date
Florian Fainelli	ffa83cc2dc	[brcm63xx] fix SPI message control handling for BCM6338/6348 BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of 16-bits. We were previously using a 16-bits write which corrupted the first byte of the TX FIFO. Also the message type was always set to Full-duplex even in the case of half-duplex messages. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32409 3c298f89-4303-0410-b956-a3cf2f4a3e73	2012-06-17 16:17:29 +00:00

Author

SHA1

Message

Date

Florian Fainelli

ffa83cc2dc

[brcm63xx] fix SPI message control handling for BCM6338/6348

BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32409 3c298f89-4303-0410-b956-a3cf2f4a3e73

2012-06-17 16:17:29 +00:00

1 Commits (4a272ceaeaddca3211ea3c309c092413c5a35ad2)