[toolchain]: add the latest avr32 toolchain patches (with additional fixes)

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27332 3c298f89-4303-0410-b956-a3cf2f4a3e73

toolchain/binutils/patches/2.20.1/700-avr32.patch

@@ -4661,7 +4661,7 @@
 +{
 +  int i, x;
 +
-+  fprintf (stream, _("Known architecture names:"));
++  fprintf (stream, _("Architectures supported by the assembler:"));
 +  x = 1000;
 +
 +  for (i = 0; arch_types[i].name; i++)
@@ -4771,7 +4771,7 @@
 +          {
 +            as_warn("Deprecated arch `%s' specified. "
 +                    "Please use '-march=ucr1' instead. "
-+                    "Converting to arch 'ucr1'\n",
++                    "Using to arch 'ucr1'\n",
 +                     s);
 +            s="ucr1";
 +          }

toolchain/gcc/patches/4.4.5/600-ubicom_support.patch

@@ -9313,7 +9313,7 @@
 +#define FATAL_EXIT_CODE 33
 --- a/gcc/config.gcc
 +++ b/gcc/config.gcc
-@@ -2321,6 +2321,34 @@ spu-*-elf*)
+@@ -2339,6 +2339,34 @@ spu-*-elf*)
  	c_target_objs="${c_target_objs} spu-c.o"
  	cxx_target_objs="${cxx_target_objs} spu-c.o"
  	;;

toolchain/gcc/patches/4.4.5/910-mbsd_multi.patch

@@ -239,7 +239,7 @@
  @item -Wstack-protector
  @opindex Wstack-protector
  @opindex Wno-stack-protector
-@@ -5720,7 +5736,7 @@ so, the first branch is redirected to ei
+@@ -5721,7 +5737,7 @@ so, the first branch is redirected to ei
  second branch or a point immediately following it, depending on whether
  the condition is known to be true or false.
  
@@ -248,7 +248,7 @@
  
  @item -fsplit-wide-types
  @opindex fsplit-wide-types
-@@ -5865,7 +5881,7 @@ safely dereference null pointers.  Use
+@@ -5866,7 +5882,7 @@ safely dereference null pointers.  Use
  @option{-fno-delete-null-pointer-checks} to disable this optimization
  for programs which depend on that behavior.
  

toolchain/gcc/patches/4.4.5/931-avr32_disable_shifted_data_opt.patch

@@ -0,0 +1,32 @@
+--- a/gcc/config/avr32/avr32.c
++++ b/gcc/config/avr32/avr32.c
+@@ -6726,7 +6726,28 @@ avr32_reorg_optimization (void)
+ 	}
+     }
+ 
+-  if (TARGET_MD_REORG_OPTIMIZATION && (optimize_size || (optimize > 0)))
++  /* Disabled this optimization since it has a bug */
++  /* In the case where the data instruction the shifted insn gets folded
++   * into is a branch destination, this breaks, i.e.
++   *
++   *    add r8, r10, r8 << 2
++   * 1:
++   *    ld.w r11, r8[0]
++   *    ...
++   *    mov r8, sp
++   *    rjmp 1b
++   *
++   * gets folded to:
++   *
++   * 1:
++   *    ld.w r11, r10[r8 << 2]
++   *    ...
++   *    mov r8, sp
++   *    rjmp 1b
++   *
++   * which is clearly wrong..
++   */
++  if (0 && TARGET_MD_REORG_OPTIMIZATION && (optimize_size || (optimize > 0)))
+     {
+ 
+       /* Scan through all insns looking for shifted add operations */

toolchain/gcc/patches/4.4.5/933-avr32_bug_7435.patch

@@ -0,0 +1,32 @@
+--- a/gcc/config/avr32/avr32.c
++++ b/gcc/config/avr32/avr32.c
+@@ -222,14 +222,14 @@ void
+ avr32_override_options (void)
+ {
+   const struct part_type_s *part;
+-  const struct arch_type_s *arch;
++  const struct arch_type_s *arch, *part_arch;
+ 
+   /*Add backward compability*/
+   if (strcmp ("uc", avr32_arch_name)== 0)
+     {
+       fprintf (stderr, "Warning: Deprecated arch `%s' specified. "
+                        "Please use '-march=ucr1' instead. "
+-                       "Converting to arch 'ucr1'\n",
++                       "Using arch 'ucr1'\n",
+                avr32_arch_name);
+       avr32_arch_name="ucr1";
+     }
+@@ -277,6 +277,12 @@ avr32_override_options (void)
+   if (!arch->name)
+     avr32_arch = &avr32_arch_types[avr32_part->arch_type];
+ 
++   /* When architecture implied by -mpart and one passed in -march are 
++    * conflicting, issue an error message */
++   part_arch = &avr32_arch_types[avr32_part->arch_type];
++   if (strcmp("none",avr32_part_name) && strcmp("none", avr32_arch_name) && strcmp(avr32_arch_name,part_arch->name))
++     error ("Conflicting architectures implied by -mpart and -march\n");
++
+   /* If optimization level is two or greater, then align start of loops to a
+      word boundary since this will allow folding the first insn of the loop.
+      Do this only for targets supporting branch prediction. */

toolchain/gcc/patches/4.4.5/934-avr32_bug_9675.patch

@@ -0,0 +1,21 @@
+--- a/gcc/config/avr32/lib1funcs.S
++++ b/gcc/config/avr32/lib1funcs.S
+@@ -1460,7 +1460,6 @@ __avr32_f64_cmp_lt:
+ 0:      
+         ld.w    r7, sp++
+         popm    pc, r12=0
+-#endif
+  
+ 3:
+         cp.w    r7, 1          /* Check sign bit from r9 */
+@@ -1481,8 +1480,8 @@ __avr32_f64_cmp_lt:
+ 	reteq	0		       /* Both operands are zero. Return false. */
+ #endif
+ 	ret	r12
+-				        
+- 
++#endif
++			        
+ #if defined(L_avr32_f64_div) || defined(L_avr32_f64_div_fast)
+         .align  2
+ 

toolchain/gcc/patches/4.4.5/999-coldfire.patch

@@ -1,6 +1,6 @@
 --- a/gcc/config.gcc
 +++ b/gcc/config.gcc
-@@ -1506,6 +1506,7 @@ m68k-*-linux*)		# Motorola m68k's runnin
+@@ -1536,6 +1536,7 @@ m68k-*-linux*)		# Motorola m68k's runnin
  	if test x$sjlj != x1; then
  	    tmake_file="$tmake_file m68k/t-slibgcc-elf-ver"
  	fi