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generic: ar8216: move PHY4 RGMII workaround code out of the loop 

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35603 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Gabor Juhos 2013-02-14 14:55:40 +00:00
parent e4468b8202
commit f31cd4f577
1 changed files with 11 additions and 11 deletions
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22
target/linux/generic/files/drivers/net/phy/ar8216.c
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@ -820,20 +820,20 @@ ar8316_hw_init(struct ar8216_priv *priv)
priv->write(priv, AR8316_REG_POSTRIP, newval); priv->write(priv, AR8316_REG_POSTRIP, newval);
if (priv->port4_phy &&
priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
/* work around for phy4 rgmii mode */
ar8216_phy_dbg_write(priv, 4, 0x12, 0x480c);
/* rx delay */
ar8216_phy_dbg_write(priv, 4, 0x0, 0x824e);
/* tx delay */
ar8216_phy_dbg_write(priv, 4, 0x5, 0x3d47);
msleep(1000);
}
/* Initialize the ports */ /* Initialize the ports */
bus = priv->mii_bus; bus = priv->mii_bus;
for (i = 0; i < 5; i++) { for (i = 0; i < 5; i++) {
if ((i == 4) && priv->port4_phy &&
priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
/* work around for phy4 rgmii mode */
ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
/* rx delay */
ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
/* tx delay */
ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
msleep(1000);
}
/* initialize the port itself */ /* initialize the port itself */
mdiobus_write(bus, i, MII_ADVERTISE, mdiobus_write(bus, i, MII_ADVERTISE,
ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);