ramips: introduce ramips_soc_prom_init and move SoC detection into that
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30887 3c298f89-4303-0410-b956-a3cf2f4a3e73master
parent
c1db1347f6
commit
ef72092022
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@ -15,6 +15,7 @@ extern unsigned char ramips_sys_type[RAMIPS_SYS_TYPE_LEN];
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void ramips_intc_irq_init(unsigned intc_base, unsigned irq, unsigned irq_base);
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u32 ramips_intc_get_status(void);
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void ramips_soc_prom_init(void);
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void ramips_soc_setup(void);
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void ramips_early_serial_setup(int line, unsigned base, unsigned freq,
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unsigned irq);
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@ -17,8 +17,6 @@
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#include <linux/init.h>
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#include <linux/io.h>
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void rt288x_detect_sys_type(void);
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#define RT288X_CPU_IRQ_BASE 0
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#define RT288X_INTC_IRQ_BASE 8
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#define RT288X_INTC_IRQ_COUNT 32
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@ -16,8 +16,6 @@
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#include <linux/init.h>
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#include <linux/io.h>
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void rt305x_detect_sys_type(void);
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#define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
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#define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
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@ -16,8 +16,6 @@
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#include <linux/init.h>
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#include <linux/io.h>
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void rt3883_detect_sys_type(void);
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#define RT3883_MEM_SIZE_MIN (2 * 1024 * 1024)
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#define RT3883_MEM_SIZE_MAX (256 * 1024 * 1024)
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@ -143,6 +143,8 @@ void __init prom_init(void)
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char **envp;
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char **argv;
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ramips_soc_prom_init();
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printk(KERN_DEBUG
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"prom: fw_arg0=%08x, fw_arg1=%08x, fw_arg2=%08x, fw_arg3=%08x\n",
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(unsigned int)fw_arg0, (unsigned int)fw_arg1,
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@ -23,15 +23,16 @@
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void __iomem * rt288x_sysc_base;
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void __iomem * rt288x_memc_base;
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void __init rt288x_detect_sys_type(void)
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void __init ramips_soc_prom_init(void)
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{
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void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT2880_SYSC_BASE);
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u32 n0;
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u32 n1;
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u32 id;
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n0 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME0);
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n1 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME1);
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id = rt288x_sysc_rr(SYSC_REG_CHIP_ID);
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n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
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n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
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id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
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snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
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"Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
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@ -52,7 +52,6 @@ void __init ramips_soc_setup(void)
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rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE);
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rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE);
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rt288x_detect_sys_type();
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rt288x_clocks_init();
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clk = clk_get(NULL, "cpu");
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@ -23,15 +23,16 @@
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void __iomem * rt305x_sysc_base;
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void __iomem * rt305x_memc_base;
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void __init rt305x_detect_sys_type(void)
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void __init ramips_soc_prom_init(void)
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{
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void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
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u32 n0;
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u32 n1;
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u32 id;
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n0 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME0);
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n1 = rt305x_sysc_rr(SYSC_REG_CHIP_NAME1);
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id = rt305x_sysc_rr(SYSC_REG_CHIP_ID);
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n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
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n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
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id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
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snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
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"Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
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@ -52,7 +52,6 @@ void __init ramips_soc_setup(void)
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rt305x_sysc_base = ioremap_nocache(RT305X_SYSC_BASE, PAGE_SIZE);
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rt305x_memc_base = ioremap_nocache(RT305X_MEMC_BASE, PAGE_SIZE);
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rt305x_detect_sys_type();
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rt305x_clocks_init();
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clk = clk_get(NULL, "cpu");
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@ -22,15 +22,16 @@
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void __iomem * rt3883_sysc_base;
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void __iomem * rt3883_memc_base;
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void __init rt3883_detect_sys_type(void)
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void __init ramips_soc_prom_init(void)
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{
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void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT3883_SYSC_BASE);
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u32 n0;
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u32 n1;
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u32 id;
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n0 = rt3883_sysc_rr(RT3883_SYSC_REG_CHIPID0_3);
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n1 = rt3883_sysc_rr(RT3883_SYSC_REG_CHIPID4_7);
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id = rt3883_sysc_rr(RT3883_SYSC_REG_REVID);
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n0 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID0_3);
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n1 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID4_7);
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id = __raw_readl(sysc + RT3883_SYSC_REG_REVID);
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snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
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"Ralink %c%c%c%c%c%c%c%c ver:%u eco:%u",
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@ -52,7 +52,6 @@ void __init ramips_soc_setup(void)
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rt3883_sysc_base = ioremap_nocache(RT3883_SYSC_BASE, PAGE_SIZE);
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rt3883_memc_base = ioremap_nocache(RT3883_MEMC_BASE, PAGE_SIZE);
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rt3883_detect_sys_type();
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rt3883_clocks_init();
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clk = clk_get(NULL, "cpu");
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