Add WiFi Pineapple NANO and TETRA support to OpenWrt CC
Sebastian Kinne
parent
e6fbf31baa
commit
e092bb3f66
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@ -233,6 +233,12 @@ get_status_led() {
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oolite)
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oolite)
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status_led="oolite:red:system"
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status_led="oolite:red:system"
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;;
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;;
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pineapple-nano)
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status_led="nano:blue"
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;;
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pineapple-tetra)
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status_led="tetra:blue"
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;;
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qihoo-c301)
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qihoo-c301)
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status_led="qihoo:green:status"
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status_led="qihoo:green:status"
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;;
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;;
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@ -44,6 +44,10 @@ case "$FIRMWARE" in
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ath9k_eeprom_extract "caldata" 4096 2048
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ath9k_eeprom_extract "caldata" 4096 2048
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ath9k_patch_firmware_mac $(mtd_get_mac_binary caldata 0)
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ath9k_patch_firmware_mac $(mtd_get_mac_binary caldata 0)
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;;
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;;
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pineapple-tetra)
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ath9k_eeprom_extract "caldata" 4096 2048
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ath9k_patch_firmware_mac $(mtd_get_mac_binary caldata 12)
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;;
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*)
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*)
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ath9k_eeprom_die "board $board is not supported yet"
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ath9k_eeprom_die "board $board is not supported yet"
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;;
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;;
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@ -57,6 +61,14 @@ case "$FIRMWARE" in
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ath9k_eeprom_extract "caldata" 20480 2048
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ath9k_eeprom_extract "caldata" 20480 2048
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ath9k_patch_firmware_mac $(mtd_get_mac_binary caldata 12)
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ath9k_patch_firmware_mac $(mtd_get_mac_binary caldata 12)
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;;
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;;
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pineapple-tetra)
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ath9k_eeprom_extract "caldata" 20480 2048
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ath9k_patch_firmware_mac $(mtd_get_mac_binary caldata 18)
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mac_lan=$(mtd_get_mac_binary caldata 0)
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[ -n "$mac_lan" ] && ifconfig eth1 hw ether "$mac_lan"
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mac_wan=$(mtd_get_mac_binary caldata 6)
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[ -n "$mac_wan" ] && ifconfig eth0 hw ether "$mac_wan"
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;;
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*)
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*)
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ath9k_eeprom_die "board $board is not supported yet"
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ath9k_eeprom_die "board $board is not supported yet"
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;;
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;;
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@ -318,6 +318,16 @@ om5p-ac)
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ucidef_set_led_netdev "port2" "port2" "om5pac:blue:wan" "eth1"
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ucidef_set_led_netdev "port2" "port2" "om5pac:blue:wan" "eth1"
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;;
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;;
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pineapple-nano)
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ucidef_set_led_netdev "wlan0" "WLAN" "nano:blue" "wlan0"
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;;
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pineapple-tetra)
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ucidef_set_led_netdev "eth0" "ETH0" "tetra:yellow" "eth0"
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ucidef_set_led_netdev "wlan0" "WLAN0" "tetra:blue" "wlan0"
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ucidef_set_led_netdev "wlan1mon" "WLAN1MON" "tetra:red" "wlan1mon"
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;;
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qihoo-c301)
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qihoo-c301)
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ucidef_set_led_wlan "wlan2g" "WLAN2G" "qihoo:red:status" "phy1tpt"
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ucidef_set_led_wlan "wlan2g" "WLAN2G" "qihoo:red:status" "phy1tpt"
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;;
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;;
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@ -509,6 +509,14 @@ wndr3700)
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uci set network.@switch_port[-1].led='2'
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uci set network.@switch_port[-1].led='2'
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;;
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;;
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pineapple-nano)
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ucidef_set_interface_lan "eth0"
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;;
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pineapple-tetra)
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ucidef_set_interfaces_lan_wan "eth1" "eth0"
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;;
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*)
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*)
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ucidef_set_interfaces_lan_wan "eth0" "eth1"
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ucidef_set_interfaces_lan_wan "eth0" "eth1"
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;;
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;;
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@ -120,6 +120,9 @@ tplink_board_detect() {
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"3C0001"*)
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"3C0001"*)
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model="OOLITE"
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model="OOLITE"
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;;
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;;
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"4e414e4f"*)
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model="pineapple-nano"
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;;
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"3C0002"*)
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"3C0002"*)
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model="MINIBOX_V1"
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model="MINIBOX_V1"
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;;
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;;
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@ -956,6 +959,12 @@ ar71xx_board_detect() {
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*WHR-HP-G300N)
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*WHR-HP-G300N)
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name="whr-hp-g300n"
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name="whr-hp-g300n"
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;;
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;;
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*"WiFi Pineapple NANO")
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name="pineapple-nano"
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;;
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*"WiFi Pineapple TETRA")
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name="pineapple-tetra"
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;;
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*ZCN-1523H-2)
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*ZCN-1523H-2)
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name="zcn-1523h-2"
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name="zcn-1523h-2"
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;;
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;;
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@ -32,7 +32,8 @@ preinit_set_mac_address() {
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dir-615-i1)
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dir-615-i1)
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fetch_mac_from_mtd nvram sys_lan_mac sys_wan_mac
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fetch_mac_from_mtd nvram sys_lan_mac sys_wan_mac
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;;
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;;
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r6100)
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r6100 | \
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pineapple-tetra)
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mac_lan=$(mtd_get_mac_binary caldata 0)
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mac_lan=$(mtd_get_mac_binary caldata 0)
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[ -n "$mac_lan" ] && ifconfig eth1 hw ether "$mac_lan"
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[ -n "$mac_lan" ] && ifconfig eth1 hw ether "$mac_lan"
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mac_wan=$(mtd_get_mac_binary caldata 6)
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mac_wan=$(mtd_get_mac_binary caldata 6)
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@ -323,6 +323,7 @@ platform_check_image() {
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minibox-v1 |\
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minibox-v1 |\
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onion-omega | \
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onion-omega | \
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oolite | \
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oolite | \
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pineapple-nano | \
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smart-300 | \
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smart-300 | \
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tl-mr10u | \
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tl-mr10u | \
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tl-mr11u | \
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tl-mr11u | \
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@ -425,7 +426,8 @@ platform_check_image() {
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nbg6716 | \
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nbg6716 | \
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r6100 | \
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r6100 | \
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wndr3700v4 | \
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wndr3700v4 | \
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wndr4300 )
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wndr4300 | \
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pineapple-tetra)
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nand_do_platform_check $board $1
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nand_do_platform_check $board $1
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return $?;
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return $?;
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;;
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;;
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@ -98,6 +98,8 @@ CONFIG_ATH79_MACH_ONION_OMEGA=y
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CONFIG_ATH79_MACH_PB42=y
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CONFIG_ATH79_MACH_PB42=y
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CONFIG_ATH79_MACH_PB44=y
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CONFIG_ATH79_MACH_PB44=y
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CONFIG_ATH79_MACH_PB92=y
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CONFIG_ATH79_MACH_PB92=y
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CONFIG_ATH79_MACH_PINEAPPLE_NANO=y
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CONFIG_ATH79_MACH_PINEAPPLE_TETRA=y
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CONFIG_ATH79_MACH_QIHOO_C301=y
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CONFIG_ATH79_MACH_QIHOO_C301=y
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CONFIG_ATH79_MACH_R6100=y
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CONFIG_ATH79_MACH_R6100=y
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# CONFIG_ATH79_MACH_RB2011 is not set
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# CONFIG_ATH79_MACH_RB2011 is not set
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@ -0,0 +1,131 @@
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/*
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* Hak5 WiFi Pineapple NANO board support
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*
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* Copyright (C) 2017 Sebastian Kinne <seb@hak5.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define PINEAPPLE_NANO_GPIO_LED_SYSTEM 18
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#define PINEAPPLE_NANO_GPIO_BTN_RESET 12
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#define PINEAPPLE_NANO_GPIO_BTN_SD 19
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#define PINEAPPLE_NANO_GPIO_USB_ALARM 20
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#define PINEAPPLE_NANO_GPIO_USB_POWER 23
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#define PINEAPPLE_NANO_KEYS_POLL_INTERVAL 20 /* msecs */
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#define PINEAPPLE_NANO_KEYS_DEBOUNCE_INTERVAL (3 * PINEAPPLE_NANO_KEYS_POLL_INTERVAL)
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#define PINEAPPLE_NANO_MAC0_OFFSET 0x0000
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#define PINEAPPLE_NANO_MAC1_OFFSET 0x0006
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#define PINEAPPLE_NANO_CALDATA_OFFSET 0x1000
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static const char *pineapple_nano_part_probes[] = {
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"tp-link",
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NULL,
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};
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static struct flash_platform_data pineapple_nano_flash_data = {
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.part_probes = pineapple_nano_part_probes,
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};
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static struct gpio_led pineapple_nano_leds_gpio[] __initdata = {
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{
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.name = "nano:blue",
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.gpio = PINEAPPLE_NANO_GPIO_LED_SYSTEM,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button pineapple_nano_gpio_keys[] __initdata = {
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{
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.desc = "SD Card Present",
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.type = EV_KEY,
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.code = BTN_1,
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.debounce_interval = PINEAPPLE_NANO_KEYS_DEBOUNCE_INTERVAL,
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.gpio = PINEAPPLE_NANO_GPIO_BTN_SD,
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.active_low = 1,
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},
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{
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.desc = "USB Alarm",
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.type = EV_KEY,
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.code = BTN_2,
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.debounce_interval = PINEAPPLE_NANO_KEYS_DEBOUNCE_INTERVAL,
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.gpio = PINEAPPLE_NANO_GPIO_USB_ALARM,
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.active_low = 1,
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},
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{
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.desc = "Reset Button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = PINEAPPLE_NANO_KEYS_DEBOUNCE_INTERVAL,
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.gpio = PINEAPPLE_NANO_GPIO_BTN_RESET,
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.active_low = 1,
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}
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};
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static void __init pineapple_nano_gpio_setup(void)
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{
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u32 t;
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ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
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AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
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AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
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AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
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AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
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t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
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t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
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ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);
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gpio_request_one(PINEAPPLE_NANO_GPIO_USB_POWER,
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GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
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"USB power");
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}
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static void __init pineapple_nano_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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pineapple_nano_gpio_setup();
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ath79_register_leds_gpio(-1, ARRAY_SIZE(pineapple_nano_leds_gpio),
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pineapple_nano_leds_gpio);
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ath79_register_gpio_keys_polled(-1, PINEAPPLE_NANO_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(pineapple_nano_gpio_keys),
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pineapple_nano_gpio_keys);
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ath79_init_mac(ath79_eth0_data.mac_addr,
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art + PINEAPPLE_NANO_MAC1_OFFSET, 0);
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ath79_register_m25p80(&pineapple_nano_flash_data);
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ath79_register_mdio(0, 0x0);
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ath79_register_eth(0);
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ath79_register_wmac(art + PINEAPPLE_NANO_CALDATA_OFFSET, NULL);
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ath79_register_usb();
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}
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MIPS_MACHINE(ATH79_MACH_PINEAPPLE_NANO, "PINEAPPLE-NANO", "WiFi Pineapple NANO",
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pineapple_nano_setup);
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@ -0,0 +1,106 @@
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/platform/ar934x_nfc.h>
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#include "common.h"
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-nfc.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#include "dev-m25p80.h"
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#define TETRA_GPIO_LED_AR9580 2
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#define TETRA_GPIO_LED_STATUS 14
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#define TETRA_GPIO_LED_WAN 19
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#define TETRA_GPIO_BTN_RESET 17
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#define TETRA_KEYS_POLL_INTERVAL 20 /* msecs */
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#define TETRA_KEYS_DEBOUNCE_INTERVAL (3 * TETRA_KEYS_POLL_INTERVAL)
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static struct gpio_led tetra_leds_gpio[] __initdata = {
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{
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.name = "tetra:red",
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.gpio = TETRA_GPIO_LED_AR9580,
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.active_low = 1,
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},
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{
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.name = "tetra:blue",
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.gpio = TETRA_GPIO_LED_STATUS,
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.active_low = 1,
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},
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{
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.name = "tetra:yellow",
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.gpio = TETRA_GPIO_LED_WAN,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button tetra_gpio_keys[] __initdata = {
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{
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.desc = "Reset Button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = TETRA_KEYS_DEBOUNCE_INTERVAL,
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.gpio = TETRA_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static void __init tetra_setup(void)
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{
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||||||
|
unsigned int old_func, new_func;
|
||||||
|
// request resource
|
||||||
|
void __iomem *TETRA_GPIO_FUNC = ioremap_nocache(AR71XX_GPIO_BASE + 0x6c, 0x04);
|
||||||
|
// Disable JTAG function
|
||||||
|
old_func = __raw_readl(TETRA_GPIO_FUNC);
|
||||||
|
new_func = old_func | (1 << 1);
|
||||||
|
__raw_writel(new_func, TETRA_GPIO_FUNC);
|
||||||
|
// free resource
|
||||||
|
iounmap(TETRA_GPIO_FUNC);
|
||||||
|
|
||||||
|
ath79_register_leds_gpio(-1, ARRAY_SIZE(tetra_leds_gpio),
|
||||||
|
tetra_leds_gpio);
|
||||||
|
ath79_register_gpio_keys_polled(-1, TETRA_KEYS_POLL_INTERVAL,
|
||||||
|
ARRAY_SIZE(tetra_gpio_keys),
|
||||||
|
tetra_gpio_keys);
|
||||||
|
|
||||||
|
ath79_register_m25p80(NULL);
|
||||||
|
|
||||||
|
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
|
||||||
|
ath79_register_mdio(1, 0x0);
|
||||||
|
|
||||||
|
/* GMAC1 is connected to the internal switch */
|
||||||
|
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
|
||||||
|
ath79_register_eth(1);
|
||||||
|
|
||||||
|
/* GMAC0 is connected to the PHY4 of the internal switch */
|
||||||
|
ath79_switch_data.phy4_mii_en = 1;
|
||||||
|
ath79_switch_data.phy_poll_mask = BIT(4);
|
||||||
|
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
|
||||||
|
ath79_eth0_data.phy_mask = BIT(4);
|
||||||
|
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
|
||||||
|
ath79_register_eth(0);
|
||||||
|
|
||||||
|
ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW);
|
||||||
|
ath79_register_nfc();
|
||||||
|
ath79_register_usb();
|
||||||
|
|
||||||
|
ath79_register_wmac_simple();
|
||||||
|
ap91_pci_init_simple();
|
||||||
|
}
|
||||||
|
|
||||||
|
MIPS_MACHINE(ATH79_MACH_PINEAPPLE_TETRA, "PINEAPPLE-TETRA",
|
||||||
|
"WiFi Pineapple TETRA", tetra_setup);
|
||||||
|
|
@ -415,7 +415,7 @@ ar934x_nfc_get_addr(struct ar934x_nfc *nfc, int column, int page_addr,
|
||||||
a0 |= ((page_addr >> 8) & 0xff) << 16;
|
a0 |= ((page_addr >> 8) & 0xff) << 16;
|
||||||
a0 |= ((page_addr >> 16) & 0xff) << 24;
|
a0 |= ((page_addr >> 16) & 0xff) << 24;
|
||||||
} else {
|
} else {
|
||||||
a0 = column & 0x0FFF;
|
a0 = column & 0xFFFF;
|
||||||
a0 |= (page_addr & 0xffff) << 16;
|
a0 |= (page_addr & 0xffff) << 16;
|
||||||
|
|
||||||
if (nfc->addr_count0 > 4)
|
if (nfc->addr_count0 > 4)
|
||||||
|
|
@ -527,7 +527,6 @@ ar934x_nfc_send_readid(struct ar934x_nfc *nfc, unsigned command)
|
||||||
|
|
||||||
err = ar934x_nfc_do_rw_command(nfc, -1, -1, AR934X_NFC_ID_BUF_SIZE,
|
err = ar934x_nfc_do_rw_command(nfc, -1, -1, AR934X_NFC_ID_BUF_SIZE,
|
||||||
cmd_reg, nfc->ctrl_reg, false);
|
cmd_reg, nfc->ctrl_reg, false);
|
||||||
|
|
||||||
nfc_debug_data("[id] ", nfc->buf, AR934X_NFC_ID_BUF_SIZE);
|
nfc_debug_data("[id] ", nfc->buf, AR934X_NFC_ID_BUF_SIZE);
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
|
|
@ -1134,6 +1133,7 @@ ar934x_nfc_init_tail(struct mtd_info *mtd)
|
||||||
case 16:
|
case 16:
|
||||||
case 64:
|
case 64:
|
||||||
case 128:
|
case 128:
|
||||||
|
case 224:
|
||||||
ar934x_nfc_wr(nfc, AR934X_NFC_REG_SPARE_SIZE, mtd->oobsize);
|
ar934x_nfc_wr(nfc, AR934X_NFC_REG_SPARE_SIZE, mtd->oobsize);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
|
@ -1267,6 +1267,30 @@ static struct nand_ecclayout ar934x_nfc_oob_64_hwecc = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* oob size = 224 */
|
||||||
|
static struct nand_ecclayout ar934x_nfc_oob_224_hwecc = {
|
||||||
|
.eccbytes = 56,
|
||||||
|
.eccpos = {
|
||||||
|
20, 21, 22, 23, 24, 25, 26, 27,
|
||||||
|
28, 29, 30, 31, 32, 33, 34, 35,
|
||||||
|
36, 37, 38, 39, 40, 41, 42, 43,
|
||||||
|
44, 45, 46, 47, 48, 49, 50, 51,
|
||||||
|
52, 53, 54, 55, 56, 57, 58, 59,
|
||||||
|
60, 61, 62, 63, 64, 65, 66, 67,
|
||||||
|
68, 69, 70, 71, 72, 73, 74, 75,
|
||||||
|
},
|
||||||
|
.oobfree = {
|
||||||
|
{
|
||||||
|
.offset = 4,
|
||||||
|
.length = 16,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.offset = 76,
|
||||||
|
.length = 148,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
static int
|
static int
|
||||||
ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc)
|
ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc)
|
||||||
{
|
{
|
||||||
|
|
@ -1292,6 +1316,17 @@ ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc)
|
||||||
nand->ecc.strength = 4;
|
nand->ecc.strength = 4;
|
||||||
nand->ecc.layout = &ar934x_nfc_oob_64_hwecc;
|
nand->ecc.layout = &ar934x_nfc_oob_64_hwecc;
|
||||||
break;
|
break;
|
||||||
|
case 4096:
|
||||||
|
nand->options = NAND_NO_SUBPAGE_WRITE;
|
||||||
|
|
||||||
|
// set this occording to the specific nand flash
|
||||||
|
// please read nand flash datasheet when you fix this
|
||||||
|
nand->ecc.size = 512;
|
||||||
|
nand->ecc.bytes = 7;
|
||||||
|
nand->ecc.strength = 4;
|
||||||
|
nand->ecc.layout = &ar934x_nfc_oob_224_hwecc;
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
dev_err(nfc->parent,
|
dev_err(nfc->parent,
|
||||||
|
|
@ -1308,6 +1343,11 @@ ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc)
|
||||||
ecc_thres = 4;
|
ecc_thres = 4;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case 12:
|
||||||
|
ecc_cap = AR934X_NFC_ECC_CTRL_ECC_CAP_12;
|
||||||
|
ecc_thres = 12;
|
||||||
|
break;
|
||||||
|
|
||||||
default:
|
default:
|
||||||
dev_err(nfc->parent, "unsupported ECC strength %u\n",
|
dev_err(nfc->parent, "unsupported ECC strength %u\n",
|
||||||
nand->ecc.strength);
|
nand->ecc.strength);
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,209 @@
|
||||||
|
/*
|
||||||
|
* drivers/mtd/nandids.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License version 2 as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#include <linux/module.h>
|
||||||
|
#include <linux/mtd/nand.h>
|
||||||
|
#include <linux/sizes.h>
|
||||||
|
|
||||||
|
#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
|
||||||
|
#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
|
||||||
|
|
||||||
|
#define SP_OPTIONS NAND_NEED_READRDY
|
||||||
|
#define SP_OPTIONS16 (SP_OPTIONS | NAND_BUSWIDTH_16)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The chip ID list:
|
||||||
|
* name, device ID, page size, chip size in MiB, eraseblock size, options
|
||||||
|
*
|
||||||
|
* If page size and eraseblock size are 0, the sizes are taken from the
|
||||||
|
* extended chip ID.
|
||||||
|
*/
|
||||||
|
struct nand_flash_dev nand_flash_ids[] = {
|
||||||
|
/*
|
||||||
|
* Some incompatible NAND chips share device ID's and so must be
|
||||||
|
* listed by full ID. We list them first so that we can easily identify
|
||||||
|
* the most specific match.
|
||||||
|
*/
|
||||||
|
{"TC58NVG2S0F 4G 3.3V 8-bit",
|
||||||
|
{ .id = {0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08} },
|
||||||
|
SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
|
||||||
|
{"TC58NVG3S0F 8G 3.3V 8-bit",
|
||||||
|
{ .id = {0x98, 0xd3, 0x90, 0x26, 0x76, 0x15, 0x02, 0x08} },
|
||||||
|
SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
|
||||||
|
{"TC58NVG5D2 32G 3.3V 8-bit",
|
||||||
|
{ .id = {0x98, 0xd7, 0x94, 0x32, 0x76, 0x56, 0x09, 0x00} },
|
||||||
|
SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
|
||||||
|
{"TC58NVG6D2 64G 3.3V 8-bit",
|
||||||
|
{ .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} },
|
||||||
|
SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
|
||||||
|
{"SDTNRGAMA 64G 3.3V 8-bit",
|
||||||
|
{ .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} },
|
||||||
|
SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
|
||||||
|
{"H27UCG8T2ATR-BC 64G 3.3V 8-bit",
|
||||||
|
{ .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} },
|
||||||
|
SZ_8K, SZ_8K, SZ_2M, 0, 6, 640, NAND_ECC_INFO(40, SZ_1K),
|
||||||
|
4 },
|
||||||
|
|
||||||
|
/*
|
||||||
|
* new nand device
|
||||||
|
* */
|
||||||
|
{
|
||||||
|
"MT29F16G08CBABA3W 2GiB 3.3V 8-bit",
|
||||||
|
{ .id = {0x2c, 0x48, 0x04, 0x46, 0x85, 0x00, 0x00, 0x00} },
|
||||||
|
SZ_4K, SZ_2K, SZ_1M, 0, 5, 224, NAND_ECC_INFO(12, 540), 0
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"MT29F16G08ABABAWP 2GiB 3.3V 8-bit",
|
||||||
|
{ .id = {0x2c, 0x48, 0x00, 0x26, 0x89, 0x00, 0x00, 0x00} },
|
||||||
|
SZ_4K, SZ_2K, SZ_512K, 0, 5, 224, NAND_ECC_INFO(4, 540), 0
|
||||||
|
},
|
||||||
|
{
|
||||||
|
"MT29F16G08CBACAWP 2GiB 3.3V 8-bit",
|
||||||
|
{ .id = {0x2c, 0x48, 0x04, 0x4a, 0xa5, 0x00, 0x00, 0x00} },
|
||||||
|
SZ_4K, SZ_2K, SZ_1M, 0, 5, 224, NAND_ECC_INFO(12, 540), 0
|
||||||
|
},
|
||||||
|
|
||||||
|
|
||||||
|
LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE5, 4, SZ_8K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xD6, 8, SZ_8K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xE6, 8, SZ_8K, SP_OPTIONS),
|
||||||
|
|
||||||
|
LEGACY_ID_NAND("NAND 16MiB 1,8V 8-bit", 0x33, 16, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 16MiB 3,3V 8-bit", 0x73, 16, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 16MiB 1,8V 16-bit", 0x43, 16, SZ_16K, SP_OPTIONS16),
|
||||||
|
LEGACY_ID_NAND("NAND 16MiB 3,3V 16-bit", 0x53, 16, SZ_16K, SP_OPTIONS16),
|
||||||
|
|
||||||
|
LEGACY_ID_NAND("NAND 32MiB 1,8V 8-bit", 0x35, 32, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 32MiB 3,3V 8-bit", 0x75, 32, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 32MiB 1,8V 16-bit", 0x45, 32, SZ_16K, SP_OPTIONS16),
|
||||||
|
LEGACY_ID_NAND("NAND 32MiB 3,3V 16-bit", 0x55, 32, SZ_16K, SP_OPTIONS16),
|
||||||
|
|
||||||
|
LEGACY_ID_NAND("NAND 64MiB 1,8V 8-bit", 0x36, 64, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 64MiB 3,3V 8-bit", 0x76, 64, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 64MiB 1,8V 16-bit", 0x46, 64, SZ_16K, SP_OPTIONS16),
|
||||||
|
LEGACY_ID_NAND("NAND 64MiB 3,3V 16-bit", 0x56, 64, SZ_16K, SP_OPTIONS16),
|
||||||
|
|
||||||
|
LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit", 0x78, 128, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 128MiB 1,8V 8-bit", 0x39, 128, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 128MiB 3,3V 8-bit", 0x79, 128, SZ_16K, SP_OPTIONS),
|
||||||
|
LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x72, 128, SZ_16K, SP_OPTIONS16),
|
||||||
|
LEGACY_ID_NAND("NAND 128MiB 1,8V 16-bit", 0x49, 128, SZ_16K, SP_OPTIONS16),
|
||||||
|
LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x74, 128, SZ_16K, SP_OPTIONS16),
|
||||||
|
LEGACY_ID_NAND("NAND 128MiB 3,3V 16-bit", 0x59, 128, SZ_16K, SP_OPTIONS16),
|
||||||
|
|
||||||
|
LEGACY_ID_NAND("NAND 256MiB 3,3V 8-bit", 0x71, 256, SZ_16K, SP_OPTIONS),
|
||||||
|
|
||||||
|
/*
|
||||||
|
* These are the new chips with large page size. Their page size and
|
||||||
|
* eraseblock size are determined from the extended ID bytes.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* 512 Megabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 1,8V 8-bit", 0xA2, 64, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 1,8V 8-bit", 0xA0, 64, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xF2, 64, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xD0, 64, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 3,3V 8-bit", 0xF0, 64, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 1,8V 16-bit", 0xB2, 64, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 1,8V 16-bit", 0xB0, 64, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 3,3V 16-bit", 0xC2, 64, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 64MiB 3,3V 16-bit", 0xC0, 64, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 1 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 128MiB 1,8V 8-bit", 0xA1, 128, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 128MiB 3,3V 8-bit", 0xF1, 128, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 128MiB 3,3V 8-bit", 0xD1, 128, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 128MiB 1,8V 16-bit", 0xB1, 128, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 128MiB 3,3V 16-bit", 0xC1, 128, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 128MiB 1,8V 16-bit", 0xAD, 128, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 2 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 256MiB 1,8V 8-bit", 0xAA, 256, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 256MiB 3,3V 8-bit", 0xDA, 256, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 256MiB 1,8V 16-bit", 0xBA, 256, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 256MiB 3,3V 16-bit", 0xCA, 256, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 4 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 512MiB 1,8V 8-bit", 0xAC, 512, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 512MiB 3,3V 8-bit", 0xDC, 512, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 512MiB 1,8V 16-bit", 0xBC, 512, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 512MiB 3,3V 16-bit", 0xCC, 512, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 8 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 1GiB 1,8V 8-bit", 0xA3, 1024, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 1GiB 3,3V 8-bit", 0xD3, 1024, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 1GiB 1,8V 16-bit", 0xB3, 1024, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 1GiB 3,3V 16-bit", 0xC3, 1024, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 16 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 2GiB 1,8V 8-bit", 0xA5, 2048, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 2GiB 3,3V 8-bit", 0xD5, 2048, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 2GiB 1,8V 16-bit", 0xB5, 2048, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 2GiB 3,3V 16-bit", 0xC5, 2048, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 32 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 4GiB 1,8V 8-bit", 0xA7, 4096, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 4GiB 3,3V 8-bit", 0xD7, 4096, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 4GiB 1,8V 16-bit", 0xB7, 4096, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 4GiB 3,3V 16-bit", 0xC7, 4096, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 64 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 8GiB 1,8V 8-bit", 0xAE, 8192, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 8GiB 3,3V 8-bit", 0xDE, 8192, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 8GiB 1,8V 16-bit", 0xBE, 8192, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 8GiB 3,3V 16-bit", 0xCE, 8192, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 128 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 16GiB 1,8V 8-bit", 0x1A, 16384, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 16GiB 3,3V 8-bit", 0x3A, 16384, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 16GiB 1,8V 16-bit", 0x2A, 16384, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 16GiB 3,3V 16-bit", 0x4A, 16384, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 256 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 32GiB 1,8V 8-bit", 0x1C, 32768, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 32GiB 3,3V 8-bit", 0x3C, 32768, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 32GiB 1,8V 16-bit", 0x2C, 32768, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 32GiB 3,3V 16-bit", 0x4C, 32768, LP_OPTIONS16),
|
||||||
|
|
||||||
|
/* 512 Gigabit */
|
||||||
|
EXTENDED_ID_NAND("NAND 64GiB 1,8V 8-bit", 0x1E, 65536, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 64GiB 3,3V 8-bit", 0x3E, 65536, LP_OPTIONS),
|
||||||
|
EXTENDED_ID_NAND("NAND 64GiB 1,8V 16-bit", 0x2E, 65536, LP_OPTIONS16),
|
||||||
|
EXTENDED_ID_NAND("NAND 64GiB 3,3V 16-bit", 0x4E, 65536, LP_OPTIONS16),
|
||||||
|
|
||||||
|
{NULL}
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Manufacturer IDs */
|
||||||
|
struct nand_manufacturers nand_manuf_ids[] = {
|
||||||
|
{NAND_MFR_TOSHIBA, "Toshiba"},
|
||||||
|
{NAND_MFR_SAMSUNG, "Samsung"},
|
||||||
|
{NAND_MFR_FUJITSU, "Fujitsu"},
|
||||||
|
{NAND_MFR_NATIONAL, "National"},
|
||||||
|
{NAND_MFR_RENESAS, "Renesas"},
|
||||||
|
{NAND_MFR_STMICRO, "ST Micro"},
|
||||||
|
{NAND_MFR_HYNIX, "Hynix"},
|
||||||
|
{NAND_MFR_MICRON, "Micron"},
|
||||||
|
{NAND_MFR_AMD, "AMD/Spansion"},
|
||||||
|
{NAND_MFR_MACRONIX, "Macronix"},
|
||||||
|
{NAND_MFR_EON, "Eon"},
|
||||||
|
{NAND_MFR_SANDISK, "SanDisk"},
|
||||||
|
{NAND_MFR_INTEL, "Intel"},
|
||||||
|
{0x0, "Unknown"}
|
||||||
|
};
|
||||||
|
|
||||||
|
EXPORT_SYMBOL(nand_manuf_ids);
|
||||||
|
EXPORT_SYMBOL(nand_flash_ids);
|
||||||
|
|
||||||
|
MODULE_LICENSE("GPL");
|
||||||
|
MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
|
||||||
|
MODULE_DESCRIPTION("Nand device & manufacturer IDs");
|
||||||
|
|
@ -0,0 +1,17 @@
|
||||||
|
#
|
||||||
|
# Copyright (C) 2017 Hak5.org
|
||||||
|
#
|
||||||
|
# This is free software, licensed under the GNU General Public License v2.
|
||||||
|
# See /LICENSE for more information.
|
||||||
|
#
|
||||||
|
|
||||||
|
define Profile/HAK5_PINEAPPLE_NANO
|
||||||
|
NAME:=Hak5 WiFi Pineapple NANO
|
||||||
|
PACKAGES:=kmod-usb-core kmod-usb2 kmod-ledtrig-usbdev kmod-ath9k-htc
|
||||||
|
endef
|
||||||
|
|
||||||
|
define Profile/HAK5_PINEAPPLE_NANO/Description
|
||||||
|
Package set optimized for the WiFi Pineapple NANO.
|
||||||
|
endef
|
||||||
|
|
||||||
|
$(eval $(call Profile,HAK5_PINEAPPLE_NANO))
|
||||||
|
|
@ -731,6 +731,15 @@ define Device/oolite
|
||||||
endef
|
endef
|
||||||
TARGET_DEVICES += oolite
|
TARGET_DEVICES += oolite
|
||||||
|
|
||||||
|
define Device/pineapple-nano
|
||||||
|
$(Device/tplink-16mlzma)
|
||||||
|
BOARDNAME := PINEAPPLE-NANO
|
||||||
|
DEVICE_PROFILE := HAK5_PINEAPPLE_NANO
|
||||||
|
TPLINK_HWID := 0x4e414e4f
|
||||||
|
CONSOLE := ttyATH0,115200
|
||||||
|
endef
|
||||||
|
TARGET_DEVICES += pineapple-nano
|
||||||
|
|
||||||
rootfs_type=$(patsubst jffs2-%,jffs2,$(patsubst squashfs-%,squashfs,$(1)))
|
rootfs_type=$(patsubst jffs2-%,jffs2,$(patsubst squashfs-%,squashfs,$(1)))
|
||||||
|
|
||||||
# $(1): rootfs type.
|
# $(1): rootfs type.
|
||||||
|
|
@ -1061,6 +1070,7 @@ mynet_n600_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,64k(devdat
|
||||||
mynet_rext_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,7808k(firmware),64k(nvram)ro,64k(ART)ro
|
mynet_rext_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,7808k(firmware),64k(nvram)ro,64k(ART)ro
|
||||||
zyx_nbg6716_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(env)ro,64k(RFdata)ro,-(nbu);ar934x-nfc:2048k(zyxel_rfsd),2048k(romd),1024k(header),2048k(kernel),-(ubi)
|
zyx_nbg6716_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(env)ro,64k(RFdata)ro,-(nbu);ar934x-nfc:2048k(zyxel_rfsd),2048k(romd),1024k(header),2048k(kernel),-(ubi)
|
||||||
qihoo_c301_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(devdata),64k(devconf),15744k(firmware),64k(warm_start),64k(action_image_config),64k(radiocfg)ro;spi0.1:15360k(upgrade2),1024k(privatedata)
|
qihoo_c301_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(devdata),64k(devconf),15744k(firmware),64k(warm_start),64k(action_image_config),64k(radiocfg)ro;spi0.1:15360k(upgrade2),1024k(privatedata)
|
||||||
|
pineapple_tetra_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,256k(u-boot-env),256k(caldata),-(mb0);ar934x-nfc:2048k(kernel),-(ubi)
|
||||||
|
|
||||||
|
|
||||||
define Image/BuildKernel
|
define Image/BuildKernel
|
||||||
|
|
@ -1769,7 +1779,7 @@ define Image/Build/NetgearNAND
|
||||||
$(eval imageraw=$(KDIR_TMP)/$(2)-raw.img)
|
$(eval imageraw=$(KDIR_TMP)/$(2)-raw.img)
|
||||||
$(CP) $(KDIR)/root.squashfs-raw $(KDIR_TMP)/root.squashfs
|
$(CP) $(KDIR)/root.squashfs-raw $(KDIR_TMP)/root.squashfs
|
||||||
echo -ne '\xde\xad\xc0\xde' > $(KDIR_TMP)/jffs2.eof
|
echo -ne '\xde\xad\xc0\xde' > $(KDIR_TMP)/jffs2.eof
|
||||||
$(call ubinize,ubinize-$(9).ini,$(KDIR_TMP),$(KDIR_TMP)/$(2)-root.ubi,128KiB,2048,-E 5)
|
$(call ubinize,ubinize-$(9).ini,$(KDIR_TMP),$(KDIR_TMP)/$(2)-root.ubi,512KiB,4096,-E 5)
|
||||||
( \
|
( \
|
||||||
dd if=$(KDIR_TMP)/vmlinux-$(2).uImage; \
|
dd if=$(KDIR_TMP)/vmlinux-$(2).uImage; \
|
||||||
dd if=$(KDIR_TMP)/$(2)-root.ubi \
|
dd if=$(KDIR_TMP)/$(2)-root.ubi \
|
||||||
|
|
@ -2151,6 +2161,8 @@ $(eval $(call SingleProfile,NetgearNAND,64k,WNDR3700V4,wndr3700v4,WNDR3700_V4,tt
|
||||||
$(eval $(call SingleProfile,NetgearNAND,64k,WNDR4300V1,wndr4300,WNDR4300,ttyS0,115200,$$(wndr4300_mtdlayout),0x33373033,WNDR4300,"",-H 29763948+0+128+128+2x2+3x3,wndr4300))
|
$(eval $(call SingleProfile,NetgearNAND,64k,WNDR4300V1,wndr4300,WNDR4300,ttyS0,115200,$$(wndr4300_mtdlayout),0x33373033,WNDR4300,"",-H 29763948+0+128+128+2x2+3x3,wndr4300))
|
||||||
$(eval $(call SingleProfile,NetgearNAND,64k,R6100,r6100,R6100,ttyS0,115200,$$(r6100_mtdlayout),0x36303030,R6100,"",-H 29764434+0+128+128+2x2+2x2,wndr4300))
|
$(eval $(call SingleProfile,NetgearNAND,64k,R6100,r6100,R6100,ttyS0,115200,$$(r6100_mtdlayout),0x36303030,R6100,"",-H 29764434+0+128+128+2x2+2x2,wndr4300))
|
||||||
|
|
||||||
|
$(eval $(call SingleProfile,NetgearNAND,64k,HAK5_PINEAPPLE_TETRA,pineapple-tetra,PINEAPPLE-TETRA,ttyS0,115200,$$(pineapple_tetra_mtdlayout),0x33373033,PINEAPPLE_TETRA,"",-H 29763948+0+128+128+2x2+3x3,pineapple-tetra))
|
||||||
|
|
||||||
$(eval $(call SingleProfile,ZyXELNAND,128k,NBG6716,nbg6716,NBG6716,ttyS0,115200,NBG6716,$$(zyx_nbg6716_mtdlayout),mem=256M))
|
$(eval $(call SingleProfile,ZyXELNAND,128k,NBG6716,nbg6716,NBG6716,ttyS0,115200,NBG6716,$$(zyx_nbg6716_mtdlayout),mem=256M))
|
||||||
|
|
||||||
$(eval $(call MultiProfile,WNDR4300,WNDR3700V4 WNDR4300V1))
|
$(eval $(call MultiProfile,WNDR4300,WNDR3700V4 WNDR4300V1))
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,26 @@
|
||||||
|
[rootfs]
|
||||||
|
# Volume mode (other option is static)
|
||||||
|
mode=ubi
|
||||||
|
# Source image
|
||||||
|
image=root.squashfs
|
||||||
|
# Volume ID in UBI image
|
||||||
|
vol_id=0
|
||||||
|
# Allow for dynamic resize
|
||||||
|
vol_type=dynamic
|
||||||
|
# Volume name
|
||||||
|
vol_name=rootfs
|
||||||
|
# Autoresize volume at first mount
|
||||||
|
# vol_flags=autoresize
|
||||||
|
|
||||||
|
[rootfs_data]
|
||||||
|
# Volume mode (other option is static)
|
||||||
|
mode=ubi
|
||||||
|
# Volume ID in UBI image
|
||||||
|
vol_id=1
|
||||||
|
# Allow for dynamic resize
|
||||||
|
vol_type=dynamic
|
||||||
|
# Volume name
|
||||||
|
vol_name=rootfs_data
|
||||||
|
# Autoresize volume at first mount
|
||||||
|
vol_flags=autoresize
|
||||||
|
vol_size=1MiB
|
||||||
|
|
@ -0,0 +1,17 @@
|
||||||
|
#
|
||||||
|
# Copyright (C) 2017 Hak5.org
|
||||||
|
#
|
||||||
|
# This is free software, licensed under the GNU General Public License v2.
|
||||||
|
# See /LICENSE for more information.
|
||||||
|
#
|
||||||
|
|
||||||
|
define Profile/HAK5_PINEAPPLE_TETRA
|
||||||
|
NAME:=Hak5 WiFi Pineapple TETRA
|
||||||
|
PACKAGES:=kmod-usb-core kmod-usb2 kmod-ledtrig-usbdev kmod-ath9k-htc
|
||||||
|
endef
|
||||||
|
|
||||||
|
define Profile/HAK5_PINEAPPLE_TETRA/Description
|
||||||
|
Package set optimized for the WiFi Pineapple TETRA.
|
||||||
|
endef
|
||||||
|
|
||||||
|
$(eval $(call Profile,HAK5_PINEAPPLE_TETRA))
|
||||||
|
|
@ -0,0 +1,54 @@
|
||||||
|
--- a/arch/mips/ath79/Kconfig
|
||||||
|
+++ b/arch/mips/ath79/Kconfig
|
||||||
|
@@ -1401,6 +1401,29 @@ config ATH79_MACH_QIHOO_C301
|
||||||
|
select ATH79_DEV_USB
|
||||||
|
select ATH79_NVRAM
|
||||||
|
|
||||||
|
+config ATH79_MACH_PINEAPPLE_NANO
|
||||||
|
+ bool "Hak5 WiFi Pineapple NANO board support"
|
||||||
|
+ select SOC_AR933X
|
||||||
|
+ select ATH79_DEV_ETH
|
||||||
|
+ select ATH79_DEV_GPIO_BUTTONS
|
||||||
|
+ select ATH79_DEV_LEDS_GPIO
|
||||||
|
+ select ATH79_DEV_M25P80
|
||||||
|
+ select ATH79_DEV_USB
|
||||||
|
+ select ATH79_DEV_WMAC
|
||||||
|
+
|
||||||
|
+config ATH79_MACH_PINEAPPLE_TETRA
|
||||||
|
+ bool "Hak5 WiFi Pineapple TETRA board support"
|
||||||
|
+ select SOC_AR934X
|
||||||
|
+ select PCI
|
||||||
|
+ select ATH79_DEV_AP9X_PCI if PCI
|
||||||
|
+ select ATH79_DEV_ETH
|
||||||
|
+ select ATH79_DEV_GPIO_BUTTONS
|
||||||
|
+ select ATH79_DEV_LEDS_GPIO
|
||||||
|
+ select ATH79_DEV_NFC
|
||||||
|
+ select ATH79_DEV_USB
|
||||||
|
+ select ATH79_DEV_WMAC
|
||||||
|
+ select ATH79_DEV_M25P80
|
||||||
|
+
|
||||||
|
endmenu
|
||||||
|
|
||||||
|
config SOC_AR71XX
|
||||||
|
--- a/arch/mips/ath79/Makefile
|
||||||
|
+++ b/arch/mips/ath79/Makefile
|
||||||
|
@@ -107,6 +107,8 @@ obj-$(CONFIG_ATH79_MACH_ONION_OMEGA) +=
|
||||||
|
obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o
|
||||||
|
obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
|
||||||
|
obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o
|
||||||
|
+obj-$(CONFIG_ATH79_MACH_PINEAPPLE_NANO) += mach-pineapple-nano.o
|
||||||
|
+obj-$(CONFIG_ATH79_MACH_PINEAPPLE_TETRA) += mach-pineapple-tetra.o
|
||||||
|
obj-$(CONFIG_ATH79_MACH_QIHOO_C301) += mach-qihoo-c301.o
|
||||||
|
obj-$(CONFIG_ATH79_MACH_R6100) += mach-r6100.o
|
||||||
|
obj-$(CONFIG_ATH79_MACH_RB4XX) += mach-rb4xx.o
|
||||||
|
--- a/arch/mips/ath79/machtypes.h
|
||||||
|
+++ b/arch/mips/ath79/machtypes.h
|
||||||
|
@@ -105,6 +105,8 @@ enum ath79_mach_type {
|
||||||
|
ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */
|
||||||
|
ATH79_MACH_PB42, /* Atheros PB42 */
|
||||||
|
ATH79_MACH_PB92, /* Atheros PB92 */
|
||||||
|
+ ATH79_MACH_PINEAPPLE_NANO, /* Hak5 WiFi Pineapple NANO */
|
||||||
|
+ ATH79_MACH_PINEAPPLE_TETRA, /* Hak5 WiFi Pineapple TETRA */
|
||||||
|
ATH79_MACH_QIHOO_C301, /* Qihoo 360 C301 */
|
||||||
|
ATH79_MACH_R6100, /* NETGEAR R6100 */
|
||||||
|
ATH79_MACH_RB_411, /* MikroTik RouterBOARD 411/411A/411AH */
|
||||||
|
|
@ -20,6 +20,16 @@
|
||||||
|
|
||||||
#define DNI_HDR_LEN 128
|
#define DNI_HDR_LEN 128
|
||||||
|
|
||||||
|
#define COL(x) "\033[;" #x "m"
|
||||||
|
#define RED COL(31)
|
||||||
|
#define GREEN COL(32)
|
||||||
|
#define YELLOW COL(33)
|
||||||
|
#define BLUE COL(34)
|
||||||
|
#define MAGENTA COL(35)
|
||||||
|
#define CYAN COL(36)
|
||||||
|
#define WHITE COL(0)
|
||||||
|
#define GRAY "\033[0m"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Globals
|
* Globals
|
||||||
*/
|
*/
|
||||||
|
|
@ -31,6 +41,16 @@ static char *region = "";
|
||||||
static char *hd_id;
|
static char *hd_id;
|
||||||
|
|
||||||
static char *board_id;
|
static char *board_id;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* special board that do not have infomation header
|
||||||
|
* */
|
||||||
|
static char *board_spec[] = {
|
||||||
|
"PINEAPPLE_TETRA",
|
||||||
|
"WNDR4300",
|
||||||
|
// "WNDR3700v4",
|
||||||
|
};
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Message macros
|
* Message macros
|
||||||
*/
|
*/
|
||||||
|
|
@ -68,15 +88,32 @@ void usage(int status)
|
||||||
exit(status);
|
exit(status);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
char is_board_spec(char **board_buf, char *board_id,
|
||||||
|
unsigned int board_buf_len)
|
||||||
|
{
|
||||||
|
unsigned int index;
|
||||||
|
char is_spec = 0;
|
||||||
|
|
||||||
|
for(index=0; index<board_buf_len; ++index){
|
||||||
|
if(strcmp(board_buf[index], board_id) == 0){
|
||||||
|
is_spec = 1;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return is_spec;
|
||||||
|
}
|
||||||
|
|
||||||
int main(int argc, char *argv[])
|
int main(int argc, char *argv[])
|
||||||
{
|
{
|
||||||
int res = EXIT_FAILURE;
|
int res = EXIT_FAILURE;
|
||||||
int buflen;
|
int buflen;
|
||||||
int err;
|
int err;
|
||||||
struct stat st;
|
struct stat st;
|
||||||
char *buf;
|
char *buf = NULL;
|
||||||
int pos, rem, i;
|
int pos, rem, i;
|
||||||
uint8_t csum;
|
uint8_t csum;
|
||||||
|
char is_spec = 0;
|
||||||
|
|
||||||
FILE *outfile, *infile;
|
FILE *outfile, *infile;
|
||||||
|
|
||||||
|
|
@ -122,6 +159,9 @@ int main(int argc, char *argv[])
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
is_spec = is_board_spec(board_spec, board_id,
|
||||||
|
sizeof(board_spec)/sizeof(board_spec[0]));
|
||||||
|
|
||||||
if (ifname == NULL) {
|
if (ifname == NULL) {
|
||||||
ERR("no input file specified");
|
ERR("no input file specified");
|
||||||
goto err;
|
goto err;
|
||||||
|
|
@ -138,14 +178,20 @@ int main(int argc, char *argv[])
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if(is_spec)
|
||||||
|
buflen = st.st_size;
|
||||||
|
else
|
||||||
buflen = st.st_size + DNI_HDR_LEN + 1;
|
buflen = st.st_size + DNI_HDR_LEN + 1;
|
||||||
|
|
||||||
buf = malloc(buflen);
|
buf = malloc(buflen);
|
||||||
|
memset(buf, 0, buflen);
|
||||||
|
|
||||||
if (!buf) {
|
if (!buf) {
|
||||||
ERR("no memory for buffer\n");
|
ERR("no memory for buffer\n");
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
|
||||||
memset(buf, 0, DNI_HDR_LEN);
|
if(!is_spec){
|
||||||
pos = snprintf(buf, DNI_HDR_LEN, "device:%s\nversion:V%s\nregion:%s\n",
|
pos = snprintf(buf, DNI_HDR_LEN, "device:%s\nversion:V%s\nregion:%s\n",
|
||||||
board_id, version, region);
|
board_id, version, region);
|
||||||
rem = DNI_HDR_LEN - pos;
|
rem = DNI_HDR_LEN - pos;
|
||||||
|
|
@ -153,6 +199,8 @@ int main(int argc, char *argv[])
|
||||||
snprintf(buf + pos, rem, "hd_id:%s\n", hd_id);
|
snprintf(buf + pos, rem, "hd_id:%s\n", hd_id);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
infile = fopen(ifname, "r");
|
infile = fopen(ifname, "r");
|
||||||
if (infile == NULL) {
|
if (infile == NULL) {
|
||||||
ERRS("could not open \"%s\" for reading", ifname);
|
ERRS("could not open \"%s\" for reading", ifname);
|
||||||
|
|
@ -160,18 +208,25 @@ int main(int argc, char *argv[])
|
||||||
}
|
}
|
||||||
|
|
||||||
errno = 0;
|
errno = 0;
|
||||||
|
|
||||||
|
if(is_spec)
|
||||||
|
fread(buf, st.st_size, 1, infile);
|
||||||
|
else
|
||||||
fread(buf + DNI_HDR_LEN, st.st_size, 1, infile);
|
fread(buf + DNI_HDR_LEN, st.st_size, 1, infile);
|
||||||
|
|
||||||
if (errno != 0) {
|
if (errno != 0) {
|
||||||
ERRS("unable to read from file %s", ifname);
|
ERRS("unable to read from file %s", ifname);
|
||||||
goto err_close_in;
|
goto err_close_in;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if(!is_spec){
|
||||||
csum = 0;
|
csum = 0;
|
||||||
for (i = 0; i < (st.st_size + DNI_HDR_LEN); i++)
|
for (i = 0; i < (st.st_size + DNI_HDR_LEN); i++)
|
||||||
csum += buf[i];
|
csum += buf[i];
|
||||||
|
|
||||||
csum = 0xff - csum;
|
csum = 0xff - csum;
|
||||||
buf[st.st_size + DNI_HDR_LEN] = csum;
|
buf[st.st_size + DNI_HDR_LEN] = csum;
|
||||||
|
}
|
||||||
|
|
||||||
outfile = fopen(ofname, "w");
|
outfile = fopen(ofname, "w");
|
||||||
if (outfile == NULL) {
|
if (outfile == NULL) {
|
||||||
|
|
|
||||||
|
|
@ -35,6 +35,7 @@
|
||||||
#define HWID_GL_INET_V1 0x08000001
|
#define HWID_GL_INET_V1 0x08000001
|
||||||
#define HWID_GS_OOLITE_V1 0x3C000101
|
#define HWID_GS_OOLITE_V1 0x3C000101
|
||||||
#define HWID_ONION_OMEGA 0x04700001
|
#define HWID_ONION_OMEGA 0x04700001
|
||||||
|
#define HWID_PINEAPPLE_NANO 0x4e414e4f
|
||||||
#define HWID_TL_MR10U_V1 0x00100101
|
#define HWID_TL_MR10U_V1 0x00100101
|
||||||
#define HWID_TL_MR13U_V1 0x00130101
|
#define HWID_TL_MR13U_V1 0x00130101
|
||||||
#define HWID_TL_MR3020_V1 0x30200001
|
#define HWID_TL_MR3020_V1 0x30200001
|
||||||
|
|
@ -431,6 +432,11 @@ static struct board_info boards[] = {
|
||||||
.hw_id = HWID_ONION_OMEGA,
|
.hw_id = HWID_ONION_OMEGA,
|
||||||
.hw_rev = 1,
|
.hw_rev = 1,
|
||||||
.layout_id = "16Mlzma",
|
.layout_id = "16Mlzma",
|
||||||
|
}, {
|
||||||
|
.id = "PINEAPPLE-NANO",
|
||||||
|
.hw_id = HWID_PINEAPPLE_NANO,
|
||||||
|
.hw_rev = 1,
|
||||||
|
.layout_id = "16Mlzma",
|
||||||
}, {
|
}, {
|
||||||
.id = "ANTMINER-S1",
|
.id = "ANTMINER-S1",
|
||||||
.hw_id = HWID_ANTMINER_S1,
|
.hw_id = HWID_ANTMINER_S1,
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue