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[mpc83xx]: upgrade to 2.6.31, add preliminary support for the Freescale MPC8377E-WLAN board - not finished, yet 

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19092 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Imre Kaloz 2010-01-10 16:02:11 +00:00
parent 1fde8606d9
commit df70260599
7 changed files with 713 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
target/linux/mpc83xx/Makefile
View File

@ -1,5 +1,5 @@
#
# Copyright (C) 2007-2009 OpenWrt.org
# Copyright (C) 2007-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@ -9,9 +9,9 @@ include $(TOPDIR)/rules.mk
ARCH:=powerpc
BOARD:=mpc83xx
BOARDNAME:=Freescale MPC83xx
FEATURES:=tgz broken
FEATURES:=squashfs tgz broken
LINUX_VERSION:=2.6.30.10
LINUX_VERSION:=2.6.31.11
include $(INCLUDE_DIR)/target.mk

63
target/linux/mpc83xx/config-default
View File

@ -21,21 +21,15 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_ASP834x is not set
CONFIG_ATA=y
# CONFIG_ATA_PIIX is not set
CONFIG_AUDIT_ARCH=y
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
# CONFIG_BOOTX_TEXT is not set
CONFIG_BOUNCE=y
# CONFIG_BRIQ_PANEL is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttyS0,115200"
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CMDLINE_BOOL=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEFAULT_UIMAGE=y
CONFIG_DEVPORT=y
@ -50,13 +44,16 @@ CONFIG_FSL_PCI=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_SOC=y
# CONFIG_FSL_ULI1575 is not set
# CONFIG_FSNOTIFY is not set
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
# CONFIG_GENERIC_IOMAP is not set
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_NVRAM=y
@ -83,26 +80,27 @@ CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_LMB=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_COUNTERS=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
# CONFIG_HVC_RTAS is not set
# CONFIG_HVC_UDBG is not set
CONFIG_HW_RANDOM=y
# CONFIG_HZ_100 is not set
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IOMMU_HELPER is not set
CONFIG_IPIC=y
CONFIG_IRQ_PER_CPU=y
# CONFIG_IRQSTACKS is not set
CONFIG_ISA_DMA_API=y
CONFIG_IRQ_PER_CPU=y
# CONFIG_ISA is not set
CONFIG_ISA_DMA_API=y
# CONFIG_JFFS2_FS is not set
CONFIG_KERNEL_START=0xc0000000
# CONFIG_KMETER1 is not set
# CONFIG_LEDS_GPIO is not set
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_MAC80211_DEFAULT_PS_VALUE=0
# CONFIG_MACINTOSH_DRIVERS is not set
# CONFIG_MMIO_NVRAM is not set
# CONFIG_MPC5121_ADS is not set
@ -115,34 +113,37 @@ CONFIG_LOWMEM_SIZE=0x30000000
# CONFIG_MPC836x_MDS is not set
# CONFIG_MPC836x_RDK is not set
# CONFIG_MPC837x_MDS is not set
# CONFIG_MPC837x_RDB is not set
CONFIG_MPC837x_RDB=y
# CONFIG_MPC8xxx_GPIO is not set
# CONFIG_MPIC_WEIRD is not set
CONFIG_MPIC=y
# CONFIG_MPIC_WEIRD is not set
# CONFIG_MTD_CFI is not set
CONFIG_MTD_NAND=y
# CONFIG_MTD_NAND_FSL_ELBC is not set
# CONFIG_MTD_NAND_FSL_UPM is not set
CONFIG_MTD_NAND_RB_PPC=y
CONFIG_MTD_NAND=y
# CONFIG_MTD_OF_PARTS is not set
# CONFIG_MV643XX_ETH is not set
CONFIG_OF=y
CONFIG_OF_DEVICE=y
CONFIG_OF_GPIO=y
CONFIG_OF=y
CONFIG_OF_MDIO=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_PATA_RB_PPC=m
CONFIG_PCIEAER=y
# CONFIG_PCIEAER_INJECT is not set
CONFIG_PCIEPORTBUS=y
# CONFIG_PCIE_ECRC is not set
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_PCSPKR_PLATFORM=y
# CONFIG_PERF_COUNTERS is not set
CONFIG_PHYLIB=y
CONFIG_PHYSICAL_START=0x00000000
# CONFIG_PPC_16K_PAGES is not set
# CONFIG_PPC_256K_PAGES is not set
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_PPC_4K_PAGES=y
# CONFIG_PPC64 is not set
# CONFIG_PPC_64K_PAGES is not set
# CONFIG_PPC_82xx is not set
CONFIG_PPC_83xx=y
# CONFIG_PPC_85xx is not set
@ -150,14 +151,17 @@ CONFIG_PPC_83xx=y
# CONFIG_PPC_8xx is not set
# CONFIG_PPC_970_NAP is not set
CONFIG_PPC_BOOK3S=y
CONFIG_PPC_BOOK3S_32=y
# CONFIG_PPC_CELL is not set
# CONFIG_PPC_CELL_NATIVE is not set
CONFIG_PPC_CHRP=y
# CONFIG_PPC_CHRP is not set
# CONFIG_PPC_CLOCK is not set
# CONFIG_PPC_DCR_MMIO is not set
# CONFIG_PPC_DCR_NATIVE is not set
CONFIG_PPC_DISABLE_WERROR=y
# CONFIG_PPC_EARLY_DEBUG is not set
CONFIG_PPC_FPU=y
CONFIG_PPC_HAVE_PMU_SUPPORT=y
CONFIG_PPC_I8259=y
# CONFIG_PPC_INDIRECT_IO is not set
CONFIG_PPC_INDIRECT_PCI=y
@ -166,16 +170,17 @@ CONFIG_PPC_LIB_RHEAP=y
CONFIG_PPC_MPC106=y
# CONFIG_PPC_MPC52xx is not set
CONFIG_PPC_MPC834x=y
CONFIG_PPC_MPC837x=y
CONFIG_PPC_NATIVE=y
CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
CONFIG_PPC_OF=y
CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
CONFIG_PPC_PCI_CHOICE=y
# CONFIG_PPC_PMAC is not set
CONFIG_PPC_RTAS=y
CONFIG_PPC_STD_MMU_32=y
CONFIG_PPC_STD_MMU=y
CONFIG_PPC_STD_MMU_32=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC=y
CONFIG_PPC_WERROR=y
# CONFIG_PQ2ADS is not set
CONFIG_PRINT_STACK_DEPTH=64
CONFIG_PROC_DEVICETREE=y
@ -198,12 +203,10 @@ CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SERIAL_QE is not set
# CONFIG_SIMPLE_GPIO is not set
# CONFIG_SLOW_WORK is not set
# CONFIG_SQUASHFS is not set
# CONFIG_SWIOTLB is not set
CONFIG_TASK_SIZE=0xc0000000
# CONFIG_TAU is not set
CONFIG_TRACING_SUPPORT=y
# CONFIG_UCC_GETH is not set
# CONFIG_UDBG_RTAS_CONSOLE is not set
# CONFIG_WATCHDOG_RTAS is not set

14
target/linux/mpc83xx/image/Makefile
View File

@ -1,5 +1,5 @@
#
# Copyright (C) 2009 OpenWrt.org
# Copyright (C) 2009-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@ -9,6 +9,7 @@ include $(INCLUDE_DIR)/image.mk
define Image/Prepare
$(LINUX_DIR)/scripts/dtc/dtc -O dtb -R 4 -S 0x20000 $(LINUX_DIR)/arch/powerpc/boot/dts/mpc8377_wlan.dts > $(KDIR)/openwrt-mpc8377_wlan.dtb
endef
define Image/BuildKernel
@ -21,11 +22,12 @@ endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
( \
dd if=$(LINUX_DIR)/arch/powerpc/boot/uImage bs=1920k conv=sync; \
dd if=$(KDIR)/openwrt-canyonlands.dtb bs=128k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=256k conv=sync; \
) > $(BIN_DIR)/openwrt-$(BOARD)-canyonlands-$(1).img
# We'll do FIT here
# ( \
# dd if=$(LINUX_DIR)/arch/powerpc/boot/uImage bs=1920k conv=sync; \
# dd if=$(KDIR)/openwrt-mpc8377_wlan.dtb bs=128k conv=sync; \
# dd if=$(KDIR)/root.$(1) bs=256k conv=sync; \
# ) > $(BIN_DIR)/openwrt-$(BOARD)-mpc8377_wlan-$(1).img
endef
$(eval $(call BuildImage))

16
target/linux/mpc83xx/patches/001-rb600.patch
View File

@ -358,7 +358,7 @@
;;
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -97,9 +97,11 @@ obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += f
@@ -104,9 +104,11 @@ obj32-$(CONFIG_PPC_PERF_CTRS) += mpc7450
obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
@ -369,7 +369,7 @@
+endif
obj-$(CONFIG_PPC64) += $(obj64-y)
obj-$(CONFIG_PPC32) += $(obj32-y)
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -30,6 +30,15 @@ config MPC832x_RDB
@ -732,7 +732,7 @@
menu "CPU Frequency drivers"
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -50,3 +50,5 @@ obj-$(CONFIG_UCODE_PATCH) += micropatch.
@@ -56,3 +56,5 @@ obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clo
ifeq ($(CONFIG_SUSPEND),y)
obj-$(CONFIG_6xx) += 6xx-suspend.o
endif
@ -966,7 +966,7 @@
+EXPORT_SYMBOL(localbus_unmap);
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -734,5 +734,12 @@ config PATA_BF54X
@@ -751,5 +751,12 @@ config PATA_BF54X
If unsure, say N.
@ -981,8 +981,8 @@
endif # ATA
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -73,6 +73,7 @@ obj-$(CONFIG_PATA_OCTEON_CF) += pata_oct
obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o
@@ -75,6 +75,7 @@ obj-$(CONFIG_PATA_PLATFORM) += pata_plat
obj-$(CONFIG_PATA_AT91) += pata_at91.o
obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o
obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o
+obj-$(CONFIG_PATA_RB_PPC) += pata_rbppc_cf.o
@ -1695,7 +1695,7 @@
+module_exit(rbppc_exit);
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -380,6 +380,13 @@ config MTD_NAND_PLATFORM
@@ -386,6 +386,13 @@ config MTD_NAND_PLATFORM
devices. You will need to provide platform-specific functions
via platform_data.
@ -1711,7 +1711,7 @@
depends on MTD_NAND && USB
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) +=
@@ -31,6 +31,7 @@ obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) +=
obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o

524
target/linux/mpc83xx/patches/002-mpc8377e-wlan_support.patch Normal file
View File

@ -0,0 +1,524 @@
From fda4bd9bac78efd2f9d566c52956d297bc03e8d9 Mon Sep 17 00:00:00 2001
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Sat, 25 Jul 2009 01:42:17 +0400
Subject: [PATCH] powerpc/83xx: Add support for MPC8377E-WLAN boards
MPC8377E-WLAN are basically RDB boards except:
- RAM extended to 512 MB;
- NAND flash removed, NOR flash extended to 64 MB;
- Vitesse VSC7385 5-port switch removed, RTL8211B PHY added;
- Power management MCU removed;
- PCI slot removed, another mini-PCI slot added (IRQ routing changed);
- USB3300 PHY's ID pin grounded, thus USB port is host-only.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/boot/dts/mpc8377_wlan.dts | 464 +++++++++++++++++++++++++++++
arch/powerpc/platforms/83xx/Kconfig | 4 +-
arch/powerpc/platforms/83xx/mpc837x_rdb.c | 5 +-
3 files changed, 469 insertions(+), 4 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mpc8377_wlan.dts
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
@@ -0,0 +1,464 @@
+/*
+ * MPC8377E WLAN Device Tree Source
+ *
+ * Copyright 2007-2009 Freescale Semiconductor Inc.
+ * Copyright 2009 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "fsl,mpc8377wlan";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8377@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; // 512MB at 0
+ };
+
+ localbus@e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+ ranges = <0x0 0x0 0xfc000000 0x04000000>;
+
+ flash@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x4000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ reg = <0 0x8000>;
+ label = "u-boot";
+ read-only;
+ };
+
+ partition@a0000 {
+ reg = <0xa0000 0x300000>;
+ label = "kernel";
+ };
+
+ partition@3a0000 {
+ reg = <0x3a0000 0x3c60000>;
+ label = "rootfs";
+ };
+ };
+ };
+
+ immr@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ device_type = "watchdog";
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ };
+
+ gpio1: gpio-controller@c00 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
+ reg = <0xc00 0x100>;
+ interrupts = <74 0x8>;
+ interrupt-parent = <&ipic>;
+ gpio-controller;
+ };
+
+ gpio2: gpio-controller@d00 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
+ reg = <0xd00 0x100>;
+ interrupts = <75 0x8>;
+ interrupt-parent = <&ipic>;
+ gpio-controller;
+ };
+
+ sleep-nexus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ sleep = <&pmc 0x0c000000>;
+ ranges;
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+
+ at24@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+ };
+
+ sdhci@2e000 {
+ compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ clock-frequency = <133333333>;
+ };
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+ };
+
+ spi@7000 {
+ cell-index = <0>;
+ compatible = "fsl,spi";
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
+ mode = "cpu";
+ };
+
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ cell-index = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
+ usb@23000 {
+ compatible = "fsl-usb2-dr";
+ reg = <0x23000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
+ phy_type = "ulpi";
+ sleep = <&pmc 0x00c00000>;
+ };
+
+ enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ ranges = <0x0 0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ phy-connection-type = "mii";
+ interrupt-parent = <&ipic>;
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy2>;
+ sleep = <&pmc 0xc0000000>;
+ fsl,magic-packet;
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x520 0x20>;
+
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
+ device_type = "ethernet-phy";
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ ranges = <0x0 0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ phy-connection-type = "mii";
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy3>;
+ tbi-handle = <&tbi1>;
+ sleep = <&pmc 0x30000000>;
+ fsl,magic-packet;
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ crypto@30000 {
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
+ sleep = <&pmc 0x03000000>;
+ };
+
+ sata@18000 {
+ compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x000000c0>;
+ };
+
+ sata@19000 {
+ compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
+ reg = <0x19000 0x1000>;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
+ sleep = <&pmc 0x00000030>;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: interrupt-controller@700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x700 0x100>;
+ };
+
+ pmc: power@b00 {
+ compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+ };
+
+ pci0: pci@e0008500 {
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
+
+ /* IDSEL AD14 IRQ6 inta */
+ 0x7000 0x0 0x0 0x1 &ipic 22 0x8
+
+ /* IDSEL AD15 IRQ5 inta */
+ 0x7800 0x0 0x0 0x1 &ipic 21 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
+ sleep = <&pmc 0x00010000>;
+ clock-frequency = <66666666>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe0008500 0x100 /* internal registers */
+ 0xe0008300 0x8>; /* config space access registers */
+ compatible = "fsl,mpc8349-pci";
+ device_type = "pci";
+ };
+
+ pci1: pcie@e0009000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+ reg = <0xe0009000 0x00001000>;
+ ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
+ bus-range = <0 255>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0 0 0 1 &ipic 1 8
+ 0 0 0 2 &ipic 1 8
+ 0 0 0 3 &ipic 1 8
+ 0 0 0 4 &ipic 1 8>;
+ sleep = <&pmc 0x00300000>;
+ clock-frequency = <0>;
+
+ pcie@0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ reg = <0 0 0 0 0>;
+ ranges = <0x02000000 0 0xa8000000
+ 0x02000000 0 0xa8000000
+ 0 0x10000000
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00800000>;
+ };
+ };
+
+ pci2: pcie@e000a000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
+ reg = <0xe000a000 0x00001000>;
+ ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
+ bus-range = <0 255>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <0 0 0 1 &ipic 2 8
+ 0 0 0 2 &ipic 2 8
+ 0 0 0 3 &ipic 2 8
+ 0 0 0 4 &ipic 2 8>;
+ sleep = <&pmc 0x000c0000>;
+ clock-frequency = <0>;
+
+ pcie@0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ reg = <0 0 0 0 0>;
+ ranges = <0x02000000 0 0xc8000000
+ 0x02000000 0 0xc8000000
+ 0 0x10000000
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00800000>;
+ };
+ };
+};
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -84,11 +84,11 @@ config MPC837x_MDS
This option enables support for the MPC837x MDS Processor Board.
config MPC837x_RDB
- bool "Freescale MPC837x RDB"
+ bool "Freescale MPC837x RDB/WLAN"
select DEFAULT_UIMAGE
select PPC_MPC837x
help
- This option enables support for the MPC837x RDB Board.
+ This option enables support for the MPC837x RDB and WLAN Boards.
config SBC834x
bool "Wind River SBC834x"
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -86,11 +86,12 @@ static int __init mpc837x_rdb_probe(void
return of_flat_dt_is_compatible(root, "fsl,mpc8377rdb") ||
of_flat_dt_is_compatible(root, "fsl,mpc8378rdb") ||
- of_flat_dt_is_compatible(root, "fsl,mpc8379rdb");
+ of_flat_dt_is_compatible(root, "fsl,mpc8379rdb") ||
+ of_flat_dt_is_compatible(root, "fsl,mpc8377wlan");
}
define_machine(mpc837x_rdb) {
- .name = "MPC837x RDB",
+ .name = "MPC837x RDB/WLAN",
.probe = mpc837x_rdb_probe,
.setup_arch = mpc837x_rdb_setup_arch,
.init_IRQ = mpc837x_rdb_init_IRQ,

113
target/linux/mpc83xx/patches/003-esdhc_wp-inverted_property.patch Normal file
View File

@ -0,0 +1,113 @@
From 50dfe70fe9e216cf356830194630f9a39e498d76 Mon Sep 17 00:00:00 2001
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Tue, 22 Sep 2009 16:45:14 -0700
Subject: [PATCH] powerpc: introduce and document sdhci,wp-inverted property for eSDHC
eSDHC block in MPC837x SOCs reports inverted write-protect state, soon
sdhci-of driver will look for sdhci,wp-inverted properties to decide
whether apply a specific quirk.
So, document the property and add it to device tree source files.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Ben Dooks <ben@fluff.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
---
Documentation/powerpc/dts-bindings/fsl/esdhc.txt | 2 ++
arch/powerpc/boot/dts/mpc8377_mds.dts | 1 +
arch/powerpc/boot/dts/mpc8377_rdb.dts | 1 +
arch/powerpc/boot/dts/mpc8377_wlan.dts | 1 +
arch/powerpc/boot/dts/mpc8378_mds.dts | 1 +
arch/powerpc/boot/dts/mpc8378_rdb.dts | 1 +
arch/powerpc/boot/dts/mpc8379_mds.dts | 1 +
arch/powerpc/boot/dts/mpc8379_rdb.dts | 1 +
8 files changed, 9 insertions(+), 0 deletions(-)
--- a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
@@ -10,6 +10,8 @@ Required properties:
- interrupts : should contain eSDHC interrupt.
- interrupt-parent : interrupt source phandle.
- clock-frequency : specifies eSDHC base clock frequency.
+ - sdhci,wp-inverted : (optional) specifies that eSDHC controller
+ reports inverted write-protect state;
- sdhci,1-bit-only : (optional) specifies that a controller can
only handle 1-bit data transfers.
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -159,6 +159,7 @@
reg = <0x2e000 0x1000>;
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
+ sdhci,wp-inverted;
/* Filled in by U-Boot */
clock-frequency = <0>;
};
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -173,6 +173,7 @@
reg = <0x2e000 0x1000>;
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
+ sdhci,wp-inverted;
/* Filled in by U-Boot */
clock-frequency = <0>;
};
--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
@@ -150,6 +150,7 @@
reg = <0x2e000 0x1000>;
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
+ sdhci,wp-inverted;
clock-frequency = <133333333>;
};
};
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -159,6 +159,7 @@
reg = <0x2e000 0x1000>;
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
+ sdhci,wp-inverted;
/* Filled in by U-Boot */
clock-frequency = <0>;
};
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -173,6 +173,7 @@
reg = <0x2e000 0x1000>;
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
+ sdhci,wp-inverted;
/* Filled in by U-Boot */
clock-frequency = <0>;
};
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -157,6 +157,7 @@
reg = <0x2e000 0x1000>;
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
+ sdhci,wp-inverted;
/* Filled in by U-Boot */
clock-frequency = <0>;
};
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -171,6 +171,7 @@
reg = <0x2e000 0x1000>;
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
+ sdhci,wp-inverted;
/* Filled in by U-Boot */
clock-frequency = <0>;
};

24
target/linux/mpc83xx/patches/004-mpc8377e-wlan_u-boot_size_fix.patch Normal file
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@ -0,0 +1,24 @@
From 850f785a1f8c8448db4d70983595b2b088cf60b7 Mon Sep 17 00:00:00 2001
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Fri, 16 Oct 2009 20:47:22 +0400
Subject: [PATCH] powerpc/83xx: Fix u-boot partion size for MPC8377E-WLAN boards
u-boot partition size should be 0x80000 (512 KB), not 0x8000 (32 KB).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/boot/dts/mpc8377_wlan.dts | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
@@ -67,7 +67,7 @@
device-width = <1>;
partition@0 {
- reg = <0 0x8000>;
+ reg = <0 0x80000>;
label = "u-boot";
read-only;
};