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more cleanup 

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@5884 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Felix Fietkau 2006-12-20 17:33:28 +00:00
parent 81c72c64bb
commit cf20abecdb
1 changed files with 2 additions and 174 deletions
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176
target/linux/rb532-2.6/patches/100-rb5xx_support.patch
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@ -1779,146 +1779,10 @@ diff -urN linux.old/include/asm-mips/rc32434/ddr.h linux.dev/include/asm-mips/rc
+} ;
+
+#endif // __IDT_DDR_H__
diff -urN linux.old/include/asm-mips/rc32434/dev.h linux.dev/include/asm-mips/rc32434/dev.h
--- linux.old/include/asm-mips/rc32434/dev.h 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/include/asm-mips/rc32434/dev.h 2006-12-14 04:09:50.000000000 +0100
@@ -0,0 +1,132 @@
+#ifndef __IDT_DEV_H__
+#define __IDT_DEV_H__
+
+/*******************************************************************************
+ *
+ * Copyright 2002 Integrated Device Technology, Inc.
+ * All rights reserved.
+ *
+ * Device Controller register definition.
+ *
+ * File : $Id: dev.h,v 1.2 2002/06/06 18:34:03 astichte Exp $
+ *
+ * Author : John.Ahrens@idt.com
+ * Date : 200112013
+ * Update :
+ * $Log: dev.h,v $
+ * Revision 1.2 2002/06/06 18:34:03 astichte
+ * Added XXX_PhysicalAddress and XXX_VirtualAddress
+ *
+ * Revision 1.1 2002/05/29 17:33:21 sysarch
+ * jba File moved from vcode/include/idt/acacia
+ *
+ *
+ ******************************************************************************/
+
+enum
+{
+ DEV0_PhysicalAddress = 0x18010000,
+ DEV_PhysicalAddress = DEV0_PhysicalAddress, // Default
+
+ DEV0_VirtualAddress = 0xb8010000,
+ DEV_VirtualAddress = DEV0_VirtualAddress, // Default
+} ;
+
+typedef struct DEVICE_s
+{
+ u32 devbase ; // Device Base
+ u32 devmask ; // Device Mask
+ u32 devc ; // Device Control
+ u32 devtc ; // Device Timing Control
+} volatile *DEVICE_t ;
+
+enum
+{
+ DEV_Count = 3,
+} ;
+
+typedef struct DEV_s
+{
+ struct DEVICE_s dev [DEV_Count] ;
+ u32 btcs ; // Bus timeout control / status
+ u32 btcompare ; // Compare
+ u32 btaddr ; // Timeout address.
+ u32 devdacs ; // Decoupled access control.
+ u32 devdaa ; // Decoupled access address.
+ u32 devdad ; // Decoupled access address.
+ u32 devspare ; // spare.
+} volatile *DEV_t ;
+
+enum
+{
+ DEVBASE_baseaddr_b = 16,
+ DEVBASE_baseaddr_m = 0xffff0000,
+ DEVMASK_mask_b = 16,
+ DEVMASK_mask_m = 0xffff0000,
+
+ DEVC_ds_b = 0,
+ DEVC_ds_m = 0x00000003,
+ DEVC_ds_8_v = 0, // 8-bit device.
+ DEVC_ds_16_v = 1, // reserved
+ DEVC_ds_res_v = 2, // reserved.
+ DEVC_ds_res2_v = 3, // reserved.
+ DEVC_be_b = 2,
+ DEVC_be_m = 0x00000004,
+ DEVC_wp_b = 3,
+ DEVC_wp_m = 0x00000008,
+ DEVC_csd_b = 4,
+ DEVC_csd_m = 0x000000f0,
+ DEVC_oed_b = 8,
+ DEVC_oed_m = 0x00000f00,
+ DEVC_bwd_b = 12,
+ DEVC_bwd_m = 0x0000f000,
+ DEVC_rws_b = 16,
+ DEVC_rws_m = 0x003f0000,
+ DEVC_wws_b = 22,
+ DEVC_wws_m = 0x0fc00000,
+ DEVC_bre_b = 28,
+ DEVC_bre_m = 0x10000000,
+ DEVC_bwe_b = 29,
+ DEVC_bwe_m = 0x20000000,
+ DEVC_wam_b = 30,
+ DEVC_wam_m = 0x40000000,
+
+ DEVTC_prd_b = 0,
+ DEVTC_prd_m = 0x0000000f,
+ DEVTC_pwd_b = 4,
+ DEVTC_pwd_m = 0x000000f0,
+ DEVTC_wdh_b = 8,
+ DEVTC_wdh_m = 0x00000700,
+ DEVTC_csh_b = 11,
+ DEVTC_csh_m = 0x00001800,
+
+ BTCS_tt_b = 0,
+ BTCS_tt_m = 0x00000001,
+ BTCS_tt_write = 0,
+ BTCS_tt_read = 1,
+ BTCS_bto_b = 1, // In btcs
+ BTCS_bto_m = 0x00000002, // In btcs
+ BTCS_bte_b = 2, // In btcs
+ BTCS_bte_m = 0x00000004, // In btcs
+
+ BTCOMPARE_compare_b = 0, // In btcompare
+ BTCOMPARE_compare_m = 0x0000ffff, // In btcompare
+
+ DEVDACS_op_b = 0, // In devdacs
+ DEVDACS_op_m = 0x00000001, // In devdacs
+ DEVDACS_op_write_v = 0,
+ DEVDACS_op_read_v = 1,
+ DEVDACS_size_b = 1, // In devdacs
+ DEVDACS_size_m = 0x00000006, // In devdacs
+ DEVDACS_size_byte_v = 0,
+ DEVDACS_size_halfword = 1,
+ DEVDACS_size_triplebyte = 2,
+ DEVDACS_size_word = 3,
+ DEVDACS_err_b = 3, // In devdacs
+ DEVDACS_err_m = 0x00000008, // In devdacs
+ DEVDACS_f_b = 4, // In devdacs
+ DEVDACS_f_m = 0x00000010, // In devdacs
+} ;
+
+#endif //__IDT_DEV_H__
+
diff -urN linux.old/include/asm-mips/rc32434/dma.h linux.dev/include/asm-mips/rc32434/dma.h
--- linux.old/include/asm-mips/rc32434/dma.h 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/include/asm-mips/rc32434/dma.h 2006-12-14 04:09:50.000000000 +0100
@@ -0,0 +1,201 @@
@@ -0,0 +1,168 @@
+#ifndef __IDT_DMA_H__
+#define __IDT_DMA_H__
+
@ -2085,39 +1949,6 @@ diff -urN linux.old/include/asm-mips/rc32434/dma.h linux.dev/include/asm-mips/rc
+ struct DMA_Chan_s ch [DMACH_count] ; //use ch[DMACH_]
+} volatile *DMA_t ;
+
+
+/*
+ * External DMA parameters
+*/
+#if 0
+enum
+{
+ DMADEVCMD_ts_b = 0, // ts field in devcmd
+ DMADEVCMD_ts_m = 0x00000007, // ts field in devcmd
+ DMADEVCMD_ts_byte_v = 0,
+ DMADEVCMD_ts_halfword_v = 1,
+ DMADEVCMD_ts_word_v = 2,
+ DMADEVCMD_ts_2word_v = 3,
+ DMADEVCMD_ts_4word_v = 4,
+ DMADEVCMD_ts_6word_v = 5,
+ DMADEVCMD_ts_8word_v = 6,
+ DMADEVCMD_ts_16word_v = 7
+};
+#endif
+
+#if 1 // aws - Compatibility.
+# define EXTDMA_ts_b DMADEVCMD_ts_b
+# define EXTDMA_ts_m DMADEVCMD_ts_m
+# define EXTDMA_ts_byte_v DMADEVCMD_ts_byte_v
+# define EXTDMA_ts_halfword_v DMADEVCMD_ts_halfword_v
+# define EXTDMA_ts_word_v DMADEVCMD_ts_word_v
+# define EXTDMA_ts_2word_v DMADEVCMD_ts_2word_v
+# define EXTDMA_ts_4word_v DMADEVCMD_ts_4word_v
+# define EXTDMA_ts_6word_v DMADEVCMD_ts_6word_v
+# define EXTDMA_ts_8word_v DMADEVCMD_ts_8word_v
+# define EXTDMA_ts_16word_v DMADEVCMD_ts_16word_v
+#endif // aws - Compatibility.
+
+#endif // __IDT_DMA_H__
+
diff -urN linux.old/include/asm-mips/rc32434/dma_v.h linux.dev/include/asm-mips/rc32434/dma_v.h
@ -2787,7 +2618,7 @@ diff -urN linux.old/include/asm-mips/rc32434/irq.h linux.dev/include/asm-mips/rc
diff -urN linux.old/include/asm-mips/rc32434/pci.h linux.dev/include/asm-mips/rc32434/pci.h
--- linux.old/include/asm-mips/rc32434/pci.h 1970-01-01 01:00:00.000000000 +0100
+++ linux.dev/include/asm-mips/rc32434/pci.h 2006-12-14 04:09:50.000000000 +0100
@@ -0,0 +1,695 @@
@@ -0,0 +1,692 @@
+/**************************************************************************
+ *
+ * BRIEF MODULE DESCRIPTION
@ -3315,9 +3146,6 @@ diff -urN linux.old/include/asm-mips/rc32434/pci.h linux.dev/include/asm-mips/rc
+#define PCIM_H_EA 0x3
+#define PCIM_H_IA_FIX 0x4
+#define PCIM_H_IA_RR 0x5
+#if 0
+#define PCI_ADDR_START 0x13000000
+#endif
+
+#define PCI_ADDR_START 0x50000000
+