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ar71xx: merge ar934x_bo_ddr_flush patch 

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30912 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Gabor Juhos 2012-03-12 20:38:57 +00:00
parent b169293875
commit caae34337e
3 changed files with 5 additions and 110 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
View File

@ -331,6 +331,10 @@ static void ar934x_set_speed_ge1(int speed)
/* TODO */
}
static void ath79_ddr_no_flush(void)
{
}
static void ath79_ddr_flush_ge0(void)
{
ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0);
@ -371,16 +375,6 @@ static void ar933x_ddr_flush_ge1(void)
ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1);
}
static void ar934x_ddr_flush_ge0(void)
{
ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0);
}
static void ar934x_ddr_flush_ge1(void)
{
ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1);
}
static struct resource ath79_eth0_resources[] = {
{
.name = "mac_base",
@ -817,17 +811,16 @@ void __init ath79_register_eth(unsigned int id)
if (id == 0) {
pdata->reset_bit = AR934X_RESET_GE0_MAC |
AR934X_RESET_GE0_MDIO;
pdata->ddr_flush =ar934x_ddr_flush_ge0;
pdata->set_speed = ar934x_set_speed_ge0;
} else {
pdata->reset_bit = AR934X_RESET_GE1_MAC |
AR934X_RESET_GE1_MDIO;
pdata->ddr_flush = ar934x_ddr_flush_ge1;
pdata->set_speed = ar934x_set_speed_ge1;
pdata->switch_data = &ath79_switch_data;
}
pdata->ddr_flush = ath79_ddr_no_flush;
pdata->has_gbit = 1;
pdata->is_ar724x = 1;

49
target/linux/ar71xx/patches-3.2/710-ar934x_no_ddr_flush.patch
View File

@ -1,49 +0,0 @@
--- a/arch/mips/ath79/dev-eth.c
+++ b/arch/mips/ath79/dev-eth.c
@@ -331,6 +331,10 @@ static void ar934x_set_speed_ge1(int spe
/* TODO */
}
+static void ath79_ddr_no_flush(void)
+{
+}
+
static void ath79_ddr_flush_ge0(void)
{
ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0);
@@ -371,16 +375,6 @@ static void ar933x_ddr_flush_ge1(void)
ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1);
}
-static void ar934x_ddr_flush_ge0(void)
-{
- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0);
-}
-
-static void ar934x_ddr_flush_ge1(void)
-{
- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1);
-}
-
static struct resource ath79_eth0_resources[] = {
{
.name = "mac_base",
@@ -817,17 +811,16 @@ void __init ath79_register_eth(unsigned
if (id == 0) {
pdata->reset_bit = AR934X_RESET_GE0_MAC |
AR934X_RESET_GE0_MDIO;
- pdata->ddr_flush =ar934x_ddr_flush_ge0;
pdata->set_speed = ar934x_set_speed_ge0;
} else {
pdata->reset_bit = AR934X_RESET_GE1_MAC |
AR934X_RESET_GE1_MDIO;
- pdata->ddr_flush = ar934x_ddr_flush_ge1;
pdata->set_speed = ar934x_set_speed_ge1;
pdata->switch_data = &ath79_switch_data;
}
+ pdata->ddr_flush = ath79_ddr_no_flush;
pdata->has_gbit = 1;
pdata->is_ar724x = 1;

49
target/linux/ar71xx/patches-3.3/710-ar934x_no_ddr_flush.patch
View File

@ -1,49 +0,0 @@
--- a/arch/mips/ath79/dev-eth.c
+++ b/arch/mips/ath79/dev-eth.c
@@ -331,6 +331,10 @@ static void ar934x_set_speed_ge1(int spe
/* TODO */
}
+static void ath79_ddr_no_flush(void)
+{
+}
+
static void ath79_ddr_flush_ge0(void)
{
ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0);
@@ -371,16 +375,6 @@ static void ar933x_ddr_flush_ge1(void)
ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1);
}
-static void ar934x_ddr_flush_ge0(void)
-{
- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0);
-}
-
-static void ar934x_ddr_flush_ge1(void)
-{
- ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1);
-}
-
static struct resource ath79_eth0_resources[] = {
{
.name = "mac_base",
@@ -817,17 +811,16 @@ void __init ath79_register_eth(unsigned
if (id == 0) {
pdata->reset_bit = AR934X_RESET_GE0_MAC |
AR934X_RESET_GE0_MDIO;
- pdata->ddr_flush =ar934x_ddr_flush_ge0;
pdata->set_speed = ar934x_set_speed_ge0;
} else {
pdata->reset_bit = AR934X_RESET_GE1_MAC |
AR934X_RESET_GE1_MDIO;
- pdata->ddr_flush = ar934x_ddr_flush_ge1;
pdata->set_speed = ar934x_set_speed_ge1;
pdata->switch_data = &ath79_switch_data;
}
+ pdata->ddr_flush = ath79_ddr_no_flush;
pdata->has_gbit = 1;
pdata->is_ar724x = 1;