kernel/3.10: use backported patch for PMC SPI flash support

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@38218 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Gabor Juhos 2013-09-26 18:01:57 +00:00
parent c4a62e1deb
commit c2a4deeab8
3 changed files with 95 additions and 79 deletions

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@ -0,0 +1,94 @@
From 6c3b88970175e18a67eb8e55c4eba10614d0d5dc Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Mon, 15 Jul 2013 12:13:56 +0200
Subject: [PATCH] mtd: chips: Add support for PMC SPI Flash chips in m25p80.c
commit 6c3b88970175e18a67eb8e55c4eba10614d0d5dc upstream.
Add support for PMC (now Chingis, part of ISSI) Pm25LV512 (512 Kib),
Pm25LV010 (1 Mib) and Pm25LQ032 (32 Mib) SPI Flash chips.
This patch addresses two generations of PMC SPI Flash chips:
- Pm25LV512 and Pm25LV010: these have 4KiB sectors and 32KiB
blocks. The 4KiB sector erase uses a non-standard opcode
(0xd7). They do not support JEDEC RDID (0x9f), and so they can only
be detected by matching their name string with pre-configured
platform data. Because of the cascaded acquisitions, the datasheet
is no longer available on the current manufacturer's website,
although it is still commonly used in some recent wireless routers
(<https://forum.openwrt.org/viewtopic.php?pid=186360#p186360>). The
only public datasheet available seems to be on GeoCities:
<http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf>
- Pm25LQ032: a newer generation flash, with 4KiB sectors and 64KiB
blocks. It uses the standard erase and JEDEC read-ID
opcodes. Manufacturer's datasheet is here:
<http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf>
This patch is resent in order to take into account both Brian Norris
remarks and this upstream patch:
commit e534ee4f9ca29fdb38eea4b0c53f2154fbd8c1ee
Author: Krzysztof Mazur <krzysiek@podlesie.net>
Date: Fri Feb 22 15:51:05 2013 +0100
mtd: m25p80: introduce SST_WRITE flag for SST byte programming
Not all SST devices implement the SST byte programming command.
Some devices (like SST25VF064C) implement only standard m25p80 page
write command.
Now SPI flash devices that need sst_write() are explicitly marked
with new SST_WRITE flag and the decision to use sst_write() is based
on this flag instead of manufacturer id.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
[Brian: fixed conflict]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
---
drivers/mtd/devices/m25p80.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -43,6 +43,7 @@
#define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */
#define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */
#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */
+#define OPCODE_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */
#define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */
#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */
@@ -682,6 +683,7 @@ struct flash_info {
#define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
#define M25P_NO_ERASE 0x02 /* No erase command needed */
#define SST_WRITE 0x04 /* use SST byte programming */
+#define SECT_4K_PMC 0x10 /* OPCODE_BE_4K_PMC works uniformly */
};
#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
@@ -762,6 +764,11 @@ static const struct spi_device_id m25p_i
{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
+ /* PMC */
+ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
+ { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
+ { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64, SECT_4K) },
+
/* Spansion -- single (large) sector size only, at least
* for the chips listed here (without boot sectors).
*/
@@ -1014,6 +1021,9 @@ static int m25p_probe(struct spi_device
if (info->flags & SECT_4K) {
flash->erase_opcode = OPCODE_BE_4K;
flash->mtd.erasesize = 4096;
+ } else if (info->flags & SECT_4K_PMC) {
+ flash->erase_opcode = OPCODE_BE_4K_PMC;
+ flash->mtd.erasesize = 4096;
} else {
flash->erase_opcode = OPCODE_SE;
flash->mtd.erasesize = info->sector_size;

View File

@ -25,7 +25,7 @@ Signed-off-by: Flavio Silveira <fggs@terra.com.br>
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -731,6 +731,9 @@ static const struct spi_device_id m25p_i
@@ -733,6 +733,9 @@ static const struct spi_device_id m25p_i
{ "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
{ "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },

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@ -1,78 +0,0 @@
From dbca80cf6b3c0d0f130cdfb4b1f19f2092f62174 Mon Sep 17 00:00:00 2001
From: Michel Stempin <michel.stempin@wanadoo.fr>
Date: Sun, 18 Aug 2013 00:50:26 +0200
Subject: [PATCH v2] mtd: m25p80: add support for PMC SPI flash
This patch adds support for PMC (now Chingis, part of ISSI) Pm25LV512 (512
kBbit), Pm25LV010 (1 Mbit) and Pm25LQ032 (32 Mbit) SPI flash.
Two generations of PMC SPI flash chips are addressed:
1) Pm25LV512 and Pm25LV010 - These have 4KB sectors and 32KB blocks. The 4KB
sector erase uses a non-standard opcode (0xd7). They do not support JEDEC RDID
(0x9f), and so they can only be detected by matching their name string with
pre-configured platform data. Because of the cascaded acquisitions, the
datasheet is no longer available on the current manufacturer's website,
although it is still commonly used in some recent wireless routers [1]. Only
public datasheet available seems to be on GeoCities [2].
2) Pm25LQ032 - A newer generation flash, with 4KB sectors and 32KB blocks. It
uses the standard erase and JEDEC read-ID opcodes. Manufacturer's datasheet is
available [3].
[1] https://forum.openwrt.org/viewtopic.php?pid=186360#p186360
[2] http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf
[3] http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
CC: Brian Norris <computersforpeace@gmail.com>
CC: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
---
Changes in v2:
- style and documentation improvements
drivers/mtd/devices/m25p80.c | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -45,6 +45,7 @@
#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */
#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */
#define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */
+#define OPCODE_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips*/
#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */
#define OPCODE_RDID 0x9f /* Read JEDEC ID */
@@ -682,6 +683,7 @@ struct flash_info {
#define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
#define M25P_NO_ERASE 0x02 /* No erase command needed */
#define SST_WRITE 0x04 /* use SST byte programming */
+#define SECT_4K_PMC 0x08 /* OPCODE_BE_4K_PMC works uniformly */
};
#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
@@ -765,6 +767,11 @@ static const struct spi_device_id m25p_i
{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
+ /* PMC -- pm25x "blocks" are 32K, sectors are 4K */
+ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
+ { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
+ { "pm25lq032", INFO(0x7F9D46, 0, 64 * 1024, 64, SECT_4K) },
+
/* Spansion -- single (large) sector size only, at least
* for the chips listed here (without boot sectors).
*/
@@ -1017,6 +1024,9 @@ static int m25p_probe(struct spi_device
if (info->flags & SECT_4K) {
flash->erase_opcode = OPCODE_BE_4K;
flash->mtd.erasesize = 4096;
+ } else if (info->flags & SECT_4K_PMC) {
+ flash->erase_opcode = OPCODE_BE_4K_PMC;
+ flash->mtd.erasesize = 4096;
} else {
flash->erase_opcode = OPCODE_SE;
flash->mtd.erasesize = info->sector_size;