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kernel: add a ssb backport required for a new mac80211 update 

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@40833 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Felix Fietkau 2014-05-23 18:48:31 +00:00
parent 9bdc296650
commit b82d436d9b
9 changed files with 174 additions and 48 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target/linux/brcm47xx/patches-3.10/095-MIPS-BCM47XX-Fix-some-very-confused-types-and-data-c.patch
View File

@ -50,7 +50,7 @@ Patchwork: http://patchwork.linux-mips.org/patch/6211/
} }
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom, static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
@@ -180,7 +180,7 @@ static void bcm47xx_fill_sprom_r1234589( @@ -181,7 +181,7 @@ static void bcm47xx_fill_sprom_r1234589(
fallback); fallback);
nvram_read_s8(prefix, NULL, "ag1", &sprom->antenna_gain.a1, 0, nvram_read_s8(prefix, NULL, "ag1", &sprom->antenna_gain.a1, 0,
fallback); fallback);
@ -59,7 +59,7 @@ Patchwork: http://patchwork.linux-mips.org/patch/6211/
} }
static void bcm47xx_fill_sprom_r12389(struct ssb_sprom *sprom, static void bcm47xx_fill_sprom_r12389(struct ssb_sprom *sprom,
@@ -633,20 +633,20 @@ static void bcm47xx_fill_sprom_path_r45( @@ -634,20 +634,20 @@ static void bcm47xx_fill_sprom_path_r45(
static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom, static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
const char *prefix, bool fallback) const char *prefix, bool fallback)
{ {

20
target/linux/generic/patches-3.10/020-ssb_update.patch
View File

@ -596,7 +596,15 @@
extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
--- a/include/linux/ssb/ssb.h --- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h
@@ -486,6 +486,7 @@ struct ssb_bus { @@ -33,6 +33,7 @@ struct ssb_sprom {
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */
u16 board_num; /* Board number from SPROM. */
u16 board_type; /* Board type from SPROM. */
@@ -486,6 +487,7 @@ struct ssb_bus {
#endif /* EMBEDDED */ #endif /* EMBEDDED */
#ifdef CONFIG_SSB_DRIVER_GPIO #ifdef CONFIG_SSB_DRIVER_GPIO
struct gpio_chip gpio; struct gpio_chip gpio;
@ -675,3 +683,13 @@
#define SSB_SPROM_BASE1 0x1000 #define SSB_SPROM_BASE1 0x1000
#define SSB_SPROM_BASE31 0x0800 #define SSB_SPROM_BASE31 0x0800
#define SSB_SPROM_REVISION 0x007E #define SSB_SPROM_REVISION 0x007E
--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
const char *prefix, bool fallback)
{
+ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);

20
target/linux/generic/patches-3.12/020-ssb_update.patch
View File

@ -503,7 +503,15 @@
ssb_bus_may_powerdown(bus); ssb_bus_may_powerdown(bus);
--- a/include/linux/ssb/ssb.h --- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h
@@ -486,6 +486,7 @@ struct ssb_bus { @@ -33,6 +33,7 @@ struct ssb_sprom {
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */
u16 board_num; /* Board number from SPROM. */
u16 board_type; /* Board type from SPROM. */
@@ -486,6 +487,7 @@ struct ssb_bus {
#endif /* EMBEDDED */ #endif /* EMBEDDED */
#ifdef CONFIG_SSB_DRIVER_GPIO #ifdef CONFIG_SSB_DRIVER_GPIO
struct gpio_chip gpio; struct gpio_chip gpio;
@ -541,3 +549,13 @@
#endif /* CONFIG_SSB_DRIVER_GIGE */ #endif /* CONFIG_SSB_DRIVER_GIGE */
#endif /* LINUX_SSB_DRIVER_GIGE_H_ */ #endif /* LINUX_SSB_DRIVER_GIGE_H_ */
--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
const char *prefix, bool fallback)
{
+ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);

20
target/linux/generic/patches-3.13/020-ssb_update.patch
View File

@ -457,7 +457,15 @@
ssb_bus_may_powerdown(bus); ssb_bus_may_powerdown(bus);
--- a/include/linux/ssb/ssb.h --- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h
@@ -486,6 +486,7 @@ struct ssb_bus { @@ -33,6 +33,7 @@ struct ssb_sprom {
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */
u16 board_num; /* Board number from SPROM. */
u16 board_type; /* Board type from SPROM. */
@@ -486,6 +487,7 @@ struct ssb_bus {
#endif /* EMBEDDED */ #endif /* EMBEDDED */
#ifdef CONFIG_SSB_DRIVER_GPIO #ifdef CONFIG_SSB_DRIVER_GPIO
struct gpio_chip gpio; struct gpio_chip gpio;
@ -465,3 +473,13 @@
#endif /* DRIVER_GPIO */ #endif /* DRIVER_GPIO */
/* Internal-only stuff follows. Do not touch. */ /* Internal-only stuff follows. Do not touch. */
--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
const char *prefix, bool fallback)
{
+ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);

36
target/linux/generic/patches-3.14/020-ssb_update.patch Normal file
View File

@ -0,0 +1,36 @@
commit 4f4aa2ec24dc45881849833a439558d3a378028c
Author: Rafał Miłecki <zajec5@gmail.com>
Date: Sun May 18 00:22:38 2014 +0200
ssb: sprom: add dev_id field for value overriding standard ID
Some devices may have different features despite sharing the same ID
(e.g. PCI ID). For example 14e4:4331 is usually a dual band, but this
can be "limited". Device with "pci/x/y/devid=0x4332" supports 2.4 GHz
only. Similarly 0x4333 will mean support for 5 GHz only.
Add entry in SPROM so info described above can be extracted and stored.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
const char *prefix, bool fallback)
{
+ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -33,6 +33,7 @@ struct ssb_sprom {
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */
u16 board_num; /* Board number from SPROM. */
u16 board_type; /* Board type from SPROM. */

17
target/linux/generic/patches-3.3/020-ssb_update.patch
View File

@ -2494,7 +2494,7 @@
#include <linux/ssb/ssb_regs.h> #include <linux/ssb/ssb_regs.h>
@@ -16,19 +18,28 @@ struct pcmcia_device; @@ -16,19 +18,29 @@ struct pcmcia_device;
struct ssb_bus; struct ssb_bus;
struct ssb_driver; struct ssb_driver;
@ -2516,6 +2516,7 @@
u8 et1phyaddr; /* MII address for enet1 */ u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */ u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */ u8 et1mdcport; /* MDIO for enet1 */
+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */ + u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */ + u16 board_type; /* Board type from SPROM. */
@ -2528,7 +2529,7 @@
u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
u16 pa0b0; u16 pa0b0;
@@ -47,10 +58,10 @@ struct ssb_sprom { @@ -47,10 +59,10 @@ struct ssb_sprom {
u8 gpio1; /* GPIO pin 1 */ u8 gpio1; /* GPIO pin 1 */
u8 gpio2; /* GPIO pin 2 */ u8 gpio2; /* GPIO pin 2 */
u8 gpio3; /* GPIO pin 3 */ u8 gpio3; /* GPIO pin 3 */
@ -2543,7 +2544,7 @@
u8 itssi_a; /* Idle TSSI Target for A-PHY */ u8 itssi_a; /* Idle TSSI Target for A-PHY */
u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
u8 tri2g; /* 2.4GHz TX isolation */ u8 tri2g; /* 2.4GHz TX isolation */
@@ -61,8 +72,8 @@ struct ssb_sprom { @@ -61,8 +73,8 @@ struct ssb_sprom {
u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */ u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */ u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */ u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
@ -2554,7 +2555,7 @@
u8 rssisav2g; /* 2GHz RSSI params */ u8 rssisav2g; /* 2GHz RSSI params */
u8 rssismc2g; u8 rssismc2g;
u8 rssismf2g; u8 rssismf2g;
@@ -82,16 +93,13 @@ struct ssb_sprom { @@ -82,16 +94,13 @@ struct ssb_sprom {
u16 boardflags2_hi; /* Board flags (bits 48-63) */ u16 boardflags2_hi; /* Board flags (bits 48-63) */
/* TODO store board flags in a single u64 */ /* TODO store board flags in a single u64 */
@ -2574,7 +2575,7 @@
} antenna_gain; } antenna_gain;
struct { struct {
@@ -103,14 +111,85 @@ struct ssb_sprom { @@ -103,14 +112,85 @@ struct ssb_sprom {
} ghz5; } ghz5;
} fem; } fem;
@ -2662,7 +2663,7 @@
}; };
@@ -166,6 +245,7 @@ struct ssb_bus_ops { @@ -166,6 +246,7 @@ struct ssb_bus_ops {
#define SSB_DEV_MINI_MACPHY 0x823 #define SSB_DEV_MINI_MACPHY 0x823
#define SSB_DEV_ARM_1176 0x824 #define SSB_DEV_ARM_1176 0x824
#define SSB_DEV_ARM_7TDMI 0x825 #define SSB_DEV_ARM_7TDMI 0x825
@ -2670,7 +2671,7 @@
/* Vendor-ID values */ /* Vendor-ID values */
#define SSB_VENDOR_BROADCOM 0x4243 #define SSB_VENDOR_BROADCOM 0x4243
@@ -260,13 +340,61 @@ enum ssb_bustype { @@ -260,13 +341,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */ /* board_type */
@ -2735,7 +2736,7 @@
/* chip_package */ /* chip_package */
#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */ #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
@@ -354,7 +482,11 @@ struct ssb_bus { @@ -354,7 +483,11 @@ struct ssb_bus {
#ifdef CONFIG_SSB_EMBEDDED #ifdef CONFIG_SSB_EMBEDDED
/* Lock for GPIO register access. */ /* Lock for GPIO register access. */
spinlock_t gpio_lock; spinlock_t gpio_lock;

11
target/linux/generic/patches-3.6/020-ssb_update.patch
View File

@ -2172,7 +2172,7 @@
#include <linux/ssb/ssb_regs.h> #include <linux/ssb/ssb_regs.h>
@@ -24,9 +26,9 @@ struct ssb_sprom_core_pwr_info { @@ -24,13 +26,14 @@ struct ssb_sprom_core_pwr_info {
struct ssb_sprom { struct ssb_sprom {
u8 revision; u8 revision;
@ -2185,7 +2185,12 @@
u8 et0phyaddr; /* MII address for enet0 */ u8 et0phyaddr; /* MII address for enet0 */
u8 et1phyaddr; /* MII address for enet1 */ u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */ u8 et0mdcport; /* MDIO for enet0 */
@@ -338,13 +340,61 @@ enum ssb_bustype { u8 et1mdcport; /* MDIO for enet1 */
+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */
u16 board_num; /* Board number from SPROM. */
u16 board_type; /* Board type from SPROM. */
@@ -338,13 +341,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */ /* board_type */
@ -2250,7 +2255,7 @@
/* chip_package */ /* chip_package */
#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */ #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
@@ -432,7 +482,11 @@ struct ssb_bus { @@ -432,7 +483,11 @@ struct ssb_bus {
#ifdef CONFIG_SSB_EMBEDDED #ifdef CONFIG_SSB_EMBEDDED
/* Lock for GPIO register access. */ /* Lock for GPIO register access. */
spinlock_t gpio_lock; spinlock_t gpio_lock;

19
target/linux/generic/patches-3.8/020-ssb_update.patch
View File

@ -1382,7 +1382,7 @@
extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
--- a/include/linux/ssb/ssb.h --- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h
@@ -26,9 +26,9 @@ struct ssb_sprom_core_pwr_info { @@ -26,13 +26,14 @@ struct ssb_sprom_core_pwr_info {
struct ssb_sprom { struct ssb_sprom {
u8 revision; u8 revision;
@ -1395,7 +1395,12 @@
u8 et0phyaddr; /* MII address for enet0 */ u8 et0phyaddr; /* MII address for enet0 */
u8 et1phyaddr; /* MII address for enet1 */ u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */ u8 et0mdcport; /* MDIO for enet0 */
@@ -340,13 +340,61 @@ enum ssb_bustype { u8 et1mdcport; /* MDIO for enet1 */
+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */
u16 board_num; /* Board number from SPROM. */
u16 board_type; /* Board type from SPROM. */
@@ -340,13 +341,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */ /* board_type */
@ -1572,3 +1577,13 @@
#define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */ #define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */ #define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
#define SSB_SPROM4_AGAIN0_SHIFT 0 #define SSB_SPROM4_AGAIN0_SHIFT 0
--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
const char *prefix, bool fallback)
{
+ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);

19
target/linux/generic/patches-3.9/020-ssb_update.patch
View File

@ -1125,7 +1125,7 @@
extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
--- a/include/linux/ssb/ssb.h --- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h
@@ -26,9 +26,9 @@ struct ssb_sprom_core_pwr_info { @@ -26,13 +26,14 @@ struct ssb_sprom_core_pwr_info {
struct ssb_sprom { struct ssb_sprom {
u8 revision; u8 revision;
@ -1138,7 +1138,12 @@
u8 et0phyaddr; /* MII address for enet0 */ u8 et0phyaddr; /* MII address for enet0 */
u8 et1phyaddr; /* MII address for enet1 */ u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */ u8 et0mdcport; /* MDIO for enet0 */
@@ -340,13 +340,61 @@ enum ssb_bustype { u8 et1mdcport; /* MDIO for enet1 */
+ u16 dev_id; /* Device ID overriding e.g. PCI ID */
u16 board_rev; /* Board revision number from SPROM. */
u16 board_num; /* Board number from SPROM. */
u16 board_type; /* Board type from SPROM. */
@@ -340,13 +341,61 @@ enum ssb_bustype {
#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
/* board_type */ /* board_type */
@ -1261,3 +1266,13 @@
#define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */ #define SSB_SPROM4_AGAIN01 0x005E /* Antenna Gain (in dBm Q5.2) */
#define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */ #define SSB_SPROM4_AGAIN0 0x00FF /* Antenna 0 */
#define SSB_SPROM4_AGAIN0_SHIFT 0 #define SSB_SPROM4_AGAIN0_SHIFT 0
--- a/arch/mips/bcm47xx/sprom.c
+++ b/arch/mips/bcm47xx/sprom.c
@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
const char *prefix, bool fallback)
{
+ nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);