ar7: initial 2.6.26 patches

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11824 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Matteo Croce 2008-07-14 10:50:30 +00:00
parent 081f1c2641
commit a0deecbe36
8 changed files with 316 additions and 0 deletions

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@ -0,0 +1,86 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -18,6 +18,24 @@
prompt "System type"
default SGI_IP22
+config AR7
+ bool "Texas Instruments AR7"
+ select BOOT_ELF32
+ select DMA_NONCOHERENT
+ select CEVT_R4K
+ select CSRC_R4K
+ select IRQ_CPU
+ select NO_EXCEPT_FILL
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_KGDB
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_GPIO
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+
config MACH_ALCHEMY
bool "Alchemy processor based machines"
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1112,9 +1112,22 @@
exception_handlers[n] = handler;
if (n == 0 && cpu_has_divec) {
- *(u32 *)(ebase + 0x200) = 0x08000000 |
- (0x03ffffff & (handler >> 2));
- flush_icache_range(ebase + 0x200, ebase + 0x204);
+ if ((handler ^ (ebase + 4)) & 0xfc000000) {
+ /* lui k0, 0x0000 */
+ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
+ /* ori k0, 0x0000 */
+ *(u32 *)(ebase + 0x204) =
+ 0x375a0000 | (handler & 0xffff);
+ /* jr k0 */
+ *(u32 *)(ebase + 0x208) = 0x03400008;
+ /* nop */
+ *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210);
+ } else {
+ *(u32 *)(ebase + 0x200) =
+ 0x08000000 | (0x03ffffff & (handler >> 2));
+ flush_icache_range(ebase + 0x200, ebase + 0x204);
+ }
}
return (void *)old_handler;
}
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -167,6 +167,13 @@
#
#
+# Texas Instruments AR7
+#
+core-$(CONFIG_AR7) += arch/mips/ar7/
+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
+load-$(CONFIG_AR7) += 0xffffffff94100000
+
+#
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -182,8 +182,10 @@
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
+ PHYS_OFFSET)
+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
+ PHYS_OFFSET)
#include <asm-generic/memory_model.h>
#include <asm-generic/page.h>

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@ -0,0 +1,28 @@
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -913,6 +913,15 @@
To compile this driver as a module, choose M here: the
module will be called mwave.
+config AR7_GPIO
+ tristate "TI AR7 GPIO Support"
+ depends on AR7
+ help
+ Give userspace access to the GPIO pins on the Texas Instruments AR7
+ processors.
+
+ If compiled as a module, it will be called ar7_gpio.
+
config SCx200_GPIO
tristate "NatSemi SCx200 GPIO Support"
depends on SCx200
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -90,6 +90,7 @@
obj-$(CONFIG_PPDEV) += ppdev.o
obj-$(CONFIG_NWBUTTON) += nwbutton.o
obj-$(CONFIG_NWFLASH) += nwflash.o
+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o
obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o
obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o
obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o

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@ -0,0 +1,23 @@
Index: linux-2.6.26/drivers/Kconfig
===================================================================
--- linux-2.6.26.orig/drivers/Kconfig 2008-07-13 23:51:29.000000000 +0200
+++ linux-2.6.26/drivers/Kconfig 2008-07-14 12:28:00.186793402 +0200
@@ -100,5 +100,7 @@
source "drivers/uio/Kconfig"
+source "drivers/vlynq/Kconfig"
+
source "drivers/xen/Kconfig"
endmenu
Index: linux-2.6.26/drivers/Makefile
===================================================================
--- linux-2.6.26.orig/drivers/Makefile 2008-07-13 23:51:29.000000000 +0200
+++ linux-2.6.26/drivers/Makefile 2008-07-14 12:27:34.362789842 +0200
@@ -92,5 +92,6 @@
obj-$(CONFIG_HID) += hid/
obj-$(CONFIG_PPC_PS3) += ps3/
obj-$(CONFIG_OF) += of/
+obj-$(CONFIG_VLYNQ) += vlynq/
obj-$(CONFIG_SSB) += ssb/
obj-$(CONFIG_VIRTIO) += virtio/

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@ -0,0 +1,11 @@
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1874,7 +1874,7 @@
config CPMAC
tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)"
- depends on NET_ETHERNET && EXPERIMENTAL && AR7 && BROKEN
+ depends on NET_ETHERNET && EXPERIMENTAL && AR7
select PHYLIB
help
TI AR7 CPMAC Ethernet support

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@ -0,0 +1,47 @@
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -33,6 +33,8 @@
#include <linux/vlynq.h>
#include <linux/leds.h>
#include <linux/string.h>
+#include <linux/phy.h>
+#include <linux/phy_fixed.h>
#include <asm/addrspace.h>
#include <asm/ar7/ar7.h>
@@ -205,6 +207,13 @@
.width = 2,
};
+/* lets assume this is suitable for both high and low cpmacs links */
+static struct fixed_phy_status fixed_phy_status __initdata = {
+ .link = 1,
+ .speed = 100,
+ .duplex = 1,
+};
+
static struct plat_cpmac_data cpmac_low_data = {
.reset_bit = 17,
.power_bit = 20,
@@ -506,6 +515,10 @@
}
if (ar7_has_high_cpmac()) {
+ res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
+ if (res && res != -ENODEV)
+ return res;
+
cpmac_get_mac(1, cpmac_high_data.dev_addr);
res = platform_device_register(&cpmac_high);
if (res)
@@ -514,6 +527,10 @@
cpmac_low_data.phy_mask = 0xffffffff;
}
+ res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
+ if (res && res != -ENODEV)
+ return res;
+
cpmac_get_mac(0, cpmac_low_data.dev_addr);
res = platform_device_register(&cpmac_low);
if (res)

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@ -0,0 +1,54 @@
--- a/drivers/mtd/ar7part.c
+++ b/drivers/mtd/ar7part.c
@@ -34,6 +34,10 @@
#define LOADER_MAGIC1 le32_to_cpu(0xfeedfa42)
#define LOADER_MAGIC2 le32_to_cpu(0xfeed1281)
+#ifndef SQUASHFS_MAGIC
+#define SQUASHFS_MAGIC 0x73717368
+#endif
+
struct ar7_bin_rec {
unsigned int checksum;
unsigned int length;
@@ -47,7 +51,8 @@
unsigned long origin)
{
struct ar7_bin_rec header;
- unsigned int offset, len;
+ unsigned int offset;
+ size_t len;
unsigned int pre_size = master->erasesize, post_size = 0;
unsigned int root_offset = ROOT_OFFSET;
@@ -66,7 +71,7 @@
do { /* Try 10 blocks starting from master->erasesize */
offset = pre_size;
master->read(master, offset,
- sizeof(header), &len, (u8 *)&header);
+ sizeof(header), &len, (uint8_t *)&header);
if (!strncmp((char *)&header, "TIENV0.8", 8))
ar7_parts[1].offset = pre_size;
if (header.checksum == LOADER_MAGIC1)
@@ -88,7 +93,7 @@
while (header.length) {
offset += sizeof(header) + header.length;
master->read(master, offset, sizeof(header),
- &len, (u8 *)&header);
+ &len, (uint8_t *)&header);
}
root_offset = offset + sizeof(header) + 4;
break;
@@ -96,10 +101,10 @@
while (header.length) {
offset += sizeof(header) + header.length;
master->read(master, offset, sizeof(header),
- &len, (u8 *)&header);
+ &len, (uint8_t *)&header);
}
root_offset = offset + sizeof(header) + 4 + 0xff;
- root_offset &= ~(u32)0xff;
+ root_offset &= ~(uint32_t)0xff;
break;
default:
printk(KERN_WARNING "Unknown magic: %08x\n", header.checksum);

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@ -0,0 +1,40 @@
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -267,6 +267,13 @@
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO,
},
+ [PORT_AR7] = {
+ .name = "TI-AR7",
+ .fifo_size = 16,
+ .tx_loadsz = 16,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
+ .flags = UART_CAP_FIFO | UART_CAP_AFE,
+ },
};
#if defined (CONFIG_SERIAL_8250_AU1X00)
@@ -2455,7 +2462,11 @@
{
struct uart_8250_port *up = (struct uart_8250_port *)port;
+#ifdef CONFIG_AR7
+ wait_for_xmitr(up, BOTH_EMPTY);
+#else
wait_for_xmitr(up, UART_LSR_THRE);
+#endif
serial_out(up, UART_TX, ch);
}
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -40,7 +40,8 @@
#define PORT_NS16550A 14
#define PORT_XSCALE 15
#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
-#define PORT_MAX_8250 16 /* max port ID */
+#define PORT_AR7 17
+#define PORT_MAX_8250 17 /* max port ID */
/*
* ARM specific type numbers. These are not currently guaranteed

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@ -0,0 +1,27 @@
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -936,7 +936,8 @@
int new_state = 0;
spin_lock(&priv->lock);
- if (priv->phy->link) {
+ if (1 /* priv->phy->link */) {
+ netif_carrier_on(dev);
netif_start_queue(dev);
if (priv->phy->duplex != priv->oldduplex) {
new_state = 1;
@@ -948,11 +949,11 @@
priv->oldspeed = priv->phy->speed;
}
- if (!priv->oldlink) {
+ /*if (!priv->oldlink) {
new_state = 1;
- priv->oldlink = 1;
+ priv->oldlink = 1;*/
netif_schedule(dev);
- }
+ /*}*/
} else if (priv->oldlink) {
netif_stop_queue(dev);
new_state = 1;