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ar71xx: move PB42 specific PCI init code into a separate file 

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@18932 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Gabor Juhos 2009-12-25 13:09:04 +00:00
parent 896369267c
commit 9bc2533b39
13 changed files with 86 additions and 101 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target/linux/ar71xx/config-2.6.30
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@ -7,6 +7,7 @@ CONFIG_AR71XX_DEV_AP91_PCI=y
CONFIG_AR71XX_DEV_AP94_PCI=y
CONFIG_AR71XX_DEV_AR913X_WMAC=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_DEV_PB42_PCI=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_AW_NR580=y

1
target/linux/ar71xx/config-2.6.31
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@ -9,6 +9,7 @@ CONFIG_AR71XX_DEV_AP91_PCI=y
CONFIG_AR71XX_DEV_AP94_PCI=y
CONFIG_AR71XX_DEV_AR913X_WMAC=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_DEV_PB42_PCI=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_AW_NR580=y

1
target/linux/ar71xx/config-2.6.32
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@ -9,6 +9,7 @@ CONFIG_AR71XX_DEV_AP91_PCI=y
CONFIG_AR71XX_DEV_AP94_PCI=y
CONFIG_AR71XX_DEV_AR913X_WMAC=y
CONFIG_AR71XX_DEV_M25P80=y
CONFIG_AR71XX_DEV_PB42_PCI=y
CONFIG_AR71XX_MACH_AP81=y
CONFIG_AR71XX_MACH_AP83=y
CONFIG_AR71XX_MACH_AW_NR580=y

9
target/linux/ar71xx/files/arch/mips/ar71xx/Kconfig
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@ -28,15 +28,18 @@ config AR71XX_MACH_DIR_825_B1
config AR71XX_MACH_PB42
bool "Atheros PB42 board support"
select AR71XX_DEV_M25P80
select AR71XX_DEV_PB42_PCI if PCI
default y
config AR71XX_MACH_PB44
bool "Atheros PB44 board support"
select AR71XX_DEV_PB42_PCI if PCI
default y
config AR71XX_MACH_AW_NR580
bool "AzureWave AW-NR580 board support"
select AR71XX_DEV_M25P80
select AR71XX_DEV_PB42_PCI if PCI
default y
config AR71XX_MACH_GENERIC
@ -47,6 +50,7 @@ config AR71XX_MACH_WP543
bool "Compex WP543/WPJ543 board support"
select MYLOADER
select AR71XX_DEV_M25P80
select AR71XX_DEV_PB42_PCI if PCI
default y
config AR71XX_MACH_WRT160NL
@ -97,6 +101,7 @@ config AR71XX_MACH_TL_WR741ND
config AR71XX_MACH_TL_WR841N_V1
bool "TP-LINK TL-WR841N v1 support"
select AR71XX_DEV_M25P80
select AR71XX_DEV_PB42_PCI if PCI
default y
config AR71XX_MACH_TL_WR941ND
@ -121,6 +126,7 @@ config AR71XX_MACH_UBNT
bool "Ubiquiti AR71xx based boards support"
select AR71XX_DEV_M25P80
select AR71XX_DEV_AP91_PCI if PCI
select AR71XX_DEV_PB42_PCI if PCI
default y
endmenu
@ -137,4 +143,7 @@ config AR71XX_DEV_AP94_PCI
config AR71XX_DEV_AR913X_WMAC
def_bool n
config AR71XX_DEV_PB42_PCI
def_bool n
endif

1
target/linux/ar71xx/files/arch/mips/ar71xx/Makefile
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@ -17,6 +17,7 @@ obj-$(CONFIG_AR71XX_DEV_AP91_PCI) += dev-ap91-pci.o
obj-$(CONFIG_AR71XX_DEV_AP94_PCI) += dev-ap94-pci.o
obj-$(CONFIG_AR71XX_DEV_AR913X_WMAC) += dev-ar913x-wmac.o
obj-$(CONFIG_AR71XX_DEV_M25P80) += dev-m25p80.o
obj-$(CONFIG_AR71XX_DEV_PB42_PCI) += dev-pb42-pci.o
obj-$(CONFIG_AR71XX_MACH_AP81) += mach-ap81.o
obj-$(CONFIG_AR71XX_MACH_AP83) += mach-ap83.o

40
target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb42-pci.c Normal file
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@ -0,0 +1,40 @@
/*
* Atheros PB42 reference board PCI initialization
*
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "dev-pb42-pci.h"
static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}, {
.slot = 2,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV2,
}
};
void __init pb42_pci_init(void)
{
ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs);
}

21
target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb42-pci.h Normal file
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@ -0,0 +1,21 @@
/*
* Atheros PB42 reference board PCI initialization
*
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _AR71XX_DEV_PB42_PCI_H
#define _AR71XX_DEV_PB42_PCI_H
#if defined(CONFIG_AR71XX_DEV_PB42_PCI)
void pb42_pci_init(void) __init;
#else
static inline void pb42_pci_init(void) { }
#endif
#endif /* _AR71XX_DEV_PB42_PCI_H */

12
target/linux/ar71xx/files/arch/mips/ar71xx/mach-aw-nr580.c
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@ -16,10 +16,10 @@
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "devices.h"
#include "dev-m25p80.h"
#include "dev-pb42-pci.h"
#define AW_NR580_GPIO_LED_READY_RED 0
#define AW_NR580_GPIO_LED_WLAN 1
@ -74,14 +74,6 @@ static struct gpio_button aw_nr580_gpio_buttons[] __initdata = {
}
};
static struct ar71xx_pci_irq aw_nr580_pci_irqs[] __initdata = {
{
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}
};
static void __init aw_nr580_setup(void)
{
ar71xx_add_device_mdio(0x0);
@ -93,7 +85,7 @@ static void __init aw_nr580_setup(void)
ar71xx_add_device_eth(0);
ar71xx_pci_init(ARRAY_SIZE(aw_nr580_pci_irqs), aw_nr580_pci_irqs);
pb42_pci_init();
ar71xx_add_device_m25p80(NULL);

20
target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb42.c
View File

@ -16,32 +16,16 @@
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "devices.h"
#include "dev-m25p80.h"
#include "dev-pb42-pci.h"
#define PB42_BUTTONS_POLL_INTERVAL 20
#define PB42_GPIO_BTN_SW4 8
#define PB42_GPIO_BTN_SW5 3
static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}, {
.slot = 2,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV2,
}
};
static struct gpio_button pb42_gpio_buttons[] __initdata = {
{
.desc = "sw4",
@ -85,7 +69,7 @@ static void __init pb42_init(void)
ARRAY_SIZE(pb42_gpio_buttons),
pb42_gpio_buttons);
ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs);
pb42_pci_init();
}
MIPS_MACHINE(AR71XX_MACH_PB42, "Atheros PB42", pb42_init);

20
target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb44.c
View File

@ -22,9 +22,9 @@
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "devices.h"
#include "dev-pb42-pci.h"
#define PB44_PCF8757_VSC7395_CS 0
#define PB44_PCF8757_STEREO_CS 1
@ -52,22 +52,6 @@
#define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + PB44_PCF8757_LED_JUMP1)
#define PB44_GPIO_LED_JUMP2 (PB44_GPIO_EXP_BASE + PB44_PCF8757_LED_JUMP2)
static struct ar71xx_pci_irq pb44_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}, {
.slot = 2,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV2,
}
};
static struct i2c_gpio_platform_data pb44_i2c_gpio_data = {
.sda_pin = PB44_GPIO_I2C_SDA,
.scl_pin = PB44_GPIO_I2C_SCL,
@ -202,7 +186,7 @@ static void __init pb44_init(void)
ar71xx_add_device_usb();
ar71xx_pci_init(ARRAY_SIZE(pb44_pci_irqs), pb44_pci_irqs);
pb42_pci_init();
i2c_register_board_info(0, pb44_i2c_board_info,
ARRAY_SIZE(pb44_i2c_board_info));

22
target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr841n.c
View File

@ -15,11 +15,10 @@
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "devices.h"
#include "dev-m25p80.h"
#include "dev-ar913x-wmac.h"
#include "dev-pb42-pci.h"
#define TL_WR841ND_V1_GPIO_LED_SYSTEM 2
#define TL_WR841ND_V1_GPIO_LED_QSS_GREEN 4
@ -65,22 +64,6 @@ static struct flash_platform_data tl_wr841n_v1_flash_data = {
#endif
};
static struct ar71xx_pci_irq tl_wr841n_v1_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}, {
.slot = 2,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV2,
}
};
static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = {
{
.name = "tl-wr841n:green:system",
@ -153,8 +136,7 @@ static void __init tl_wr841n_v1_setup(void)
ARRAY_SIZE(tl_wr841n_v1_gpio_buttons),
tl_wr841n_v1_gpio_buttons);
ar71xx_pci_init(ARRAY_SIZE(tl_wr841n_v1_pci_irqs),
tl_wr841n_v1_pci_irqs);
pb42_pci_init();
}
MIPS_MACHINE(AR71XX_MACH_TL_WR841N_V1, "TP-LINK TL-WR841N v1",

20
target/linux/ar71xx/files/arch/mips/ar71xx/mach-ubnt.c
View File

@ -16,11 +16,11 @@
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "devices.h"
#include "dev-m25p80.h"
#include "dev-ap91-pci.h"
#include "dev-pb42-pci.h"
#define UBNT_RS_GPIO_LED_RF 2
#define UBNT_RS_GPIO_SW4 8
@ -41,22 +41,6 @@
#define UBNT_BUTTONS_POLL_INTERVAL 20
static struct ar71xx_pci_irq ubnt_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}, {
.slot = 2,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV2,
}
};
static struct gpio_led ubnt_rs_leds_gpio[] __initdata = {
{
.name = "ubnt:green:rf",
@ -147,7 +131,7 @@ static void __init ubnt_generic_setup(void)
ARRAY_SIZE(ubnt_gpio_buttons),
ubnt_gpio_buttons);
ar71xx_pci_init(ARRAY_SIZE(ubnt_pci_irqs), ubnt_pci_irqs);
pb42_pci_init();
}
#define UBNT_RS_WAN_PHYMASK (1 << 20)

19
target/linux/ar71xx/files/arch/mips/ar71xx/mach-wp543.c
View File

@ -20,6 +20,7 @@
#include "devices.h"
#include "dev-m25p80.h"
#include "dev-pb42-pci.h"
#define WP543_GPIO_SW6 2
#define WP543_GPIO_LED_1 3
@ -31,22 +32,6 @@
#define WP543_BUTTONS_POLL_INTERVAL 20
static struct ar71xx_pci_irq wp543_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV1,
}, {
.slot = 2,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV2,
}
};
static struct gpio_led wp543_leds_gpio[] __initdata = {
{
.name = "wp543:green:led1",
@ -101,7 +86,7 @@ static void __init wp543_setup(void)
ar71xx_add_device_usb();
ar71xx_pci_init(ARRAY_SIZE(wp543_pci_irqs), wp543_pci_irqs);
pb42_pci_init();
ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wp543_leds_gpio),
wp543_leds_gpio);