hak5
/
wifipineapple-openwrt
mirror of https://github.com/hak5/wifipineapple-openwrt.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

ar71xx: fix ethernet device registration for the QCA9556 SoC 

Based on http://patchwork.openwrt.org/patch/3162/

Signed-off-by: Embedded Wireless GmbH <info at embeddedwireless.de>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35394 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Gabor Juhos 2013-01-29 19:12:28 +00:00
parent caffade41b
commit 8ba4c7ce6e
1 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
View File

@ -181,6 +181,7 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
if (ath79_soc == ATH79_SOC_AR9341 || if (ath79_soc == ATH79_SOC_AR9341 ||
ath79_soc == ATH79_SOC_AR9342 || ath79_soc == ATH79_SOC_AR9342 ||
ath79_soc == ATH79_SOC_AR9344 || ath79_soc == ATH79_SOC_AR9344 ||
ath79_soc == ATH79_SOC_QCA9556 ||
ath79_soc == ATH79_SOC_QCA9558) ath79_soc == ATH79_SOC_QCA9558)
max_id = 1; max_id = 1;
else else
@ -202,6 +203,7 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
case ATH79_SOC_AR9341: case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342: case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344: case ATH79_SOC_AR9344:
case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558: case ATH79_SOC_QCA9558:
if (id == 0) { if (id == 0) {
mdio_dev = &ath79_mdio0_device; mdio_dev = &ath79_mdio0_device;
@ -250,12 +252,17 @@ void __init ath79_register_mdio(unsigned int id, u32 phy_mask)
} }
mdio_data->is_ar934x = 1; mdio_data->is_ar934x = 1;
break; break;
case ATH79_SOC_QCA9558: case ATH79_SOC_QCA9558:
if (id == 1) if (id == 1)
mdio_data->builtin_switch = 1; mdio_data->builtin_switch = 1;
mdio_data->is_ar934x = 1; mdio_data->is_ar934x = 1;
break; break;
case ATH79_SOC_QCA9556:
mdio_data->is_ar934x = 1;
break;
default: default:
break; break;
} }
@ -560,6 +567,7 @@ static void __init ath79_init_eth_pll_data(unsigned int id)
case ATH79_SOC_AR9341: case ATH79_SOC_AR9341:
case ATH79_SOC_AR9342: case ATH79_SOC_AR9342:
case ATH79_SOC_AR9344: case ATH79_SOC_AR9344:
case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558: case ATH79_SOC_QCA9558:
pll_10 = AR934X_PLL_VAL_10; pll_10 = AR934X_PLL_VAL_10;
pll_100 = AR934X_PLL_VAL_100; pll_100 = AR934X_PLL_VAL_100;
@ -636,6 +644,7 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
} }
break; break;
case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558: case ATH79_SOC_QCA9558:
switch (pdata->phy_if_mode) { switch (pdata->phy_if_mode) {
case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_MII:
@ -693,6 +702,7 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
} }
break; break;
case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558: case ATH79_SOC_QCA9558:
switch (pdata->phy_if_mode) { switch (pdata->phy_if_mode) {
case PHY_INTERFACE_MODE_MII: case PHY_INTERFACE_MODE_MII:
@ -953,6 +963,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->fifo_cfg3 = 0x01f00140; pdata->fifo_cfg3 = 0x01f00140;
break; break;
case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558: case ATH79_SOC_QCA9558:
if (id == 0) { if (id == 0) {
pdata->reset_bit = QCA955X_RESET_GE0_MAC | pdata->reset_bit = QCA955X_RESET_GE0_MAC |
@ -1018,6 +1029,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->mii_bus_dev = &ath79_mdio1_device.dev; pdata->mii_bus_dev = &ath79_mdio1_device.dev;
break; break;
case ATH79_SOC_QCA9556:
case ATH79_SOC_QCA9558: case ATH79_SOC_QCA9558:
/* don't assign any MDIO device by default */ /* don't assign any MDIO device by default */
break; break;