ar71xx: use backported PCI patches
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35877 3c298f89-4303-0410-b956-a3cf2f4a3e73master
parent
6ec2ddce1b
commit
8b0b9fe414
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@ -1,12 +1,20 @@
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From f2d2d928c3900b67a5f95e53b86de5b61a3ab12c Mon Sep 17 00:00:00 2001
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From 42541838d9fdbad8573141d69cf8e38831a6cbb6 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 11 Jun 2012 13:19:44 +0200
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Subject: [PATCH 04/34] MIPS: pci-ar724x: convert to a platform driver
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Date: Sat, 2 Feb 2013 11:40:42 +0000
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Subject: [PATCH] MIPS: pci-ar724x: convert into a platform driver
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commit 58d2e9bcd682d76bcb9575dc56c85f1d82a81bfa upstream.
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The patch converts the pci-ar724x driver into a
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platform driver. This makes it possible to register
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the PCI controller as a plain platform device.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4905/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/pci/pci-ar724x.c | 57 ++++++++++++++++++++++++++++++++++++++++++-
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1 files changed, 55 insertions(+), 2 deletions(-)
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arch/mips/pci/pci-ar724x.c | 57 ++++++++++++++++++++++++++++++++++++++++++--
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1 file changed, 55 insertions(+), 2 deletions(-)
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--- a/arch/mips/pci/pci-ar724x.c
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+++ b/arch/mips/pci/pci-ar724x.c
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@ -1,12 +1,20 @@
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From d1a22e73f991145a4abd7d0c37bcf318703c89ed Mon Sep 17 00:00:00 2001
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From 060c9a226a25e044167e877d9830ec53f836da9e Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 11 Jun 2012 13:24:55 +0200
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Subject: [PATCH 05/34] MIPS: pci-ar71xx: convert to a platform driver
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Date: Sat, 2 Feb 2013 11:40:43 +0000
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Subject: [PATCH] MIPS: pci-ar71xx: convert into a platform driver
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commit fb167e891d5cc6386840dd092af2d461b38eb802 upstream.
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The patch converts the pci-ar71xx driver into a
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platform driver. This makes it possible to register
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the PCI controller as a plain platform device.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4906/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/pci/pci-ar71xx.c | 60 +++++++++++++++++++++++++++++++++++++++++---
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1 files changed, 56 insertions(+), 4 deletions(-)
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1 file changed, 56 insertions(+), 4 deletions(-)
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--- a/arch/mips/pci/pci-ar71xx.c
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+++ b/arch/mips/pci/pci-ar71xx.c
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@ -1,11 +1,15 @@
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From c3a8b5fa196cedc4b940c1e5ec482dd875aa3180 Mon Sep 17 00:00:00 2001
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From 1dece618b107f5db28c8f63d4d32424dd18324d1 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 11 Jun 2012 13:38:06 +0200
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Subject: [PATCH 06/34] MIPS: ath79: move global PCI defines into a common header
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Date: Mon, 4 Feb 2013 11:56:53 +0100
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Subject: [PATCH] MIPS: ath79: move global PCI defines into a common header
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commit ad4ce92e919f7ad5561a2060deb58899de58b40c upstream.
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The constants will be used by a subsequent patch.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4907/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 24 ++++++++++++++++++++++++
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arch/mips/pci/pci-ar71xx.c | 16 ----------------
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@ -1,12 +1,22 @@
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From 2fdf8dcff3ffaa806e9f9d7f1c1bd876222cff4d Mon Sep 17 00:00:00 2001
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From 87cdbe4315e4c72c2bc8568d1258e1207e1c772b Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 11 Jun 2012 13:39:32 +0200
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Subject: [PATCH 07/34] MIPS: ath79: register platform devices for the PCI controllers
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Date: Sat, 2 Feb 2013 11:44:24 +0000
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Subject: [PATCH] MIPS: ath79: register platform devices for the PCI
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controllers
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commit 9fc1ca5b73a82daedffa2d1d5daa48dd2093c39a upstream.
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The pci-ar71xx and pci-ar724x drivers were converted
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into platform drivers. Register the corresponding
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platform devices for the PCI controllers instead
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of using the ar7{1x,24}x_pcibios_init functions.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4908/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/pci.c | 87 +++++++++++++++++++++++++++++++++++++++++++-----
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1 files changed, 78 insertions(+), 9 deletions(-)
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arch/mips/ath79/pci.c | 87 ++++++++++++++++++++++++++++++++++++++++++++-----
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1 file changed, 78 insertions(+), 9 deletions(-)
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--- a/arch/mips/ath79/pci.c
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+++ b/arch/mips/ath79/pci.c
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@ -1,17 +1,22 @@
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From 07224e2fa5f889162ee0560c6ab1eb8cd16a8dd2 Mon Sep 17 00:00:00 2001
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From db36c9d6a6be232bdee245407fc8ccde53ea69c6 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 11 Jun 2012 14:59:39 +0200
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Subject: [PATCH 08/34] MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functions
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Date: Mon, 4 Feb 2013 11:58:49 +0100
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Subject: [PATCH] MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init
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functions
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commit 6e783865b4e60f2ecf7708f8ea24db5c5ea07ced upstream.
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The functions are unused now, so remove them.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4909/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/pci.c | 1 -
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arch/mips/include/asm/mach-ath79/pci.h | 28 ----------------------------
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arch/mips/pci/pci-ar71xx.c | 26 --------------------------
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arch/mips/pci/pci-ar724x.c | 32 --------------------------------
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4 files changed, 0 insertions(+), 87 deletions(-)
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4 files changed, 87 deletions(-)
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delete mode 100644 arch/mips/include/asm/mach-ath79/pci.h
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--- a/arch/mips/ath79/pci.c
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@ -1,12 +1,29 @@
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From a018b28d3953a32008de839d997a992a724ae314 Mon Sep 17 00:00:00 2001
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From 4da85831c8eaf2de2cadae6723e8231068c313b7 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sun, 24 Jun 2012 17:40:45 +0200
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Subject: [PATCH 09/34] MIPS: avoid possible resource conflict in register_pci_controller
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Date: Sat, 2 Feb 2013 13:18:54 +0000
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Subject: [PATCH] MIPS: avoid possible resource conflict in
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register_pci_controller
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commit 222831787704c9ad9215f6b56f975b233968607c upstream.
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The IO and memory resources of a PCI controller
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might already have a parent resource set when
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they are passed to 'register_pci_controller'.
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If the parent resource is set, the request_resource
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call will fail due to resource conflict and the
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current code will not be able to register the
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PCI controller.
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Use the parent resource if it is available in the
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request_resource call to avoid the isssue.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4910/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/pci/pci.c | 15 +++++++++++++--
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1 files changed, 13 insertions(+), 2 deletions(-)
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1 file changed, 13 insertions(+), 2 deletions(-)
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--- a/arch/mips/pci/pci.c
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+++ b/arch/mips/pci/pci.c
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@ -1,13 +1,19 @@
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From 12c68e4fccadc22a0470177141a57892a76e4a2b Mon Sep 17 00:00:00 2001
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From 53ba4919664636487155c810fb49781169780e0c Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sun, 24 Jun 2012 15:33:16 +0200
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Subject: [PATCH 25/34] MIPS: ath79: allow to specify bus number in PCI IRQ maps
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Date: Sun, 3 Feb 2013 09:58:37 +0000
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Subject: [PATCH] MIPS: ath79: allow to specify bus number in PCI IRQ maps
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commit 617fed41e98417f3ea3e9974be251e125c8796f2 upstream.
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This is needed for multiple PCI bus support.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4913/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/pci.c | 4 +++-
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arch/mips/ath79/pci.h | 1 +
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2 files changed, 4 insertions(+), 1 deletions(-)
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2 files changed, 4 insertions(+), 1 deletion(-)
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--- a/arch/mips/ath79/pci.c
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+++ b/arch/mips/ath79/pci.c
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@ -1,12 +1,26 @@
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From 242aedf3246dc5085271aca56134ac455bfb64b5 Mon Sep 17 00:00:00 2001
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From 21b3cafae425cf2e317a22292a9a5773ff0e2e5e Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Sun, 24 Jun 2012 11:51:34 +0200
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Subject: [PATCH 10/34] MIPS: pci-ar724x: use dynamically allocated PCI controller structure
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Date: Sun, 3 Feb 2013 09:58:38 +0000
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Subject: [PATCH] MIPS: pci-ar724x: use dynamically allocated PCI controller
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structure
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commit 908339ef25b1d5e80f1c6fab22b9958174708b4a upstream.
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The current code uses static variables to store the
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PCI controller specific data. This works if the system
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contains one PCI controller only, however it becomes
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impractical when multiple PCI controllers are present.
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Move the variables into a dynamically allocated controller
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specific structure, and use that instead of the static
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variables.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4912/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/pci/pci-ar724x.c | 129 ++++++++++++++++++++++++++++----------------
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1 files changed, 82 insertions(+), 47 deletions(-)
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1 file changed, 82 insertions(+), 47 deletions(-)
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--- a/arch/mips/pci/pci-ar724x.c
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+++ b/arch/mips/pci/pci-ar724x.c
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@ -1,11 +1,19 @@
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From f1c3a7dadf7b77809cda7f77df4b1ba3b24fbfa3 Mon Sep 17 00:00:00 2001
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From d80b05d19c2772ded40403d578d8e90d38c85257 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 27 Jun 2012 10:12:50 +0200
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Subject: [PATCH 11/34] MIPS: pci-ar724x: remove static PCI resources
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Date: Sun, 3 Feb 2013 09:59:45 +0000
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Subject: [PATCH] MIPS: pci-ar724x: remove static PCI IO/MEM resources
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Get those from the platform device instead.
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commit 34b134aebda89888b6985b7a3139e9cbdf209236 upstream.
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Static resources become impractical when multiple
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PCI controllers are present. Move the resources
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into the platform device registration code and
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change the probe routine to get those from there
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platform device's resources.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4914/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/pci.c | 21 ++++++++++++++++++++-
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arch/mips/pci/pci-ar724x.c | 40 ++++++++++++++++++++++++----------------
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@ -13,7 +21,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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--- a/arch/mips/ath79/pci.c
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+++ b/arch/mips/ath79/pci.c
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@@ -137,10 +137,13 @@ static struct platform_device *
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@@ -139,10 +139,13 @@ static struct platform_device *
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ath79_register_pci_ar724x(int id,
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unsigned long cfg_base,
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unsigned long ctrl_base,
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@ -28,7 +36,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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memset(res, 0, sizeof(res));
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@@ -158,6 +161,16 @@ ath79_register_pci_ar724x(int id,
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@@ -160,6 +163,16 @@ ath79_register_pci_ar724x(int id,
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res[2].start = irq;
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res[2].end = irq;
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@ -45,7 +53,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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pdev = platform_device_register_simple("ar724x-pci", id,
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res, ARRAY_SIZE(res));
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return pdev;
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@@ -173,6 +186,9 @@ int __init ath79_register_pci(void)
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@@ -175,6 +188,9 @@ int __init ath79_register_pci(void)
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pdev = ath79_register_pci_ar724x(-1,
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AR724X_PCI_CFG_BASE,
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AR724X_PCI_CTRL_BASE,
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@ -55,7 +63,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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ATH79_CPU_IRQ_IP2);
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} else if (soc_is_ar9342() ||
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soc_is_ar9344()) {
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@@ -185,6 +201,9 @@ int __init ath79_register_pci(void)
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@@ -187,6 +203,9 @@ int __init ath79_register_pci(void)
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pdev = ath79_register_pci_ar724x(-1,
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AR724X_PCI_CFG_BASE,
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AR724X_PCI_CTRL_BASE,
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@ -1,12 +1,19 @@
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From d258929cd4c8c495f619f0e66d9d1c23f3f9246f Mon Sep 17 00:00:00 2001
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From d85015ff3ab6df0e776c2aefc51f2da023c1edcf Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Tue, 26 Jun 2012 11:59:45 +0200
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Subject: [PATCH 12/34] MIPS: pci-ar724x: use per-controller IRQ base
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Date: Sun, 3 Feb 2013 10:00:16 +0000
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Subject: [PATCH] MIPS: pci-ar724x: use per-controller IRQ base
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commit 8b66d461187ff61c5755001af7296e6edde48423 upstream.
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Change to the code to use per-controller IRQ base.
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This is needed for multiple PCI controller support.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4915/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/pci/pci-ar724x.c | 31 +++++++++++++++++++++----------
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1 files changed, 21 insertions(+), 10 deletions(-)
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1 file changed, 21 insertions(+), 10 deletions(-)
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--- a/arch/mips/pci/pci-ar724x.c
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+++ b/arch/mips/pci/pci-ar724x.c
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@ -69,7 +76,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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-static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc)
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+static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
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+ int id)
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+ int id)
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{
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void __iomem *base;
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int i;
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@ -1,18 +1,31 @@
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From 93824983ceb36d4ce1f4a644031ec6fb5f332f1d Mon Sep 17 00:00:00 2001
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From 5e079d9b7ac5dda3be9f215f8440333597f57b26 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Tue, 26 Jun 2012 15:14:47 +0200
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Subject: [PATCH 13/34] MIPS: pci-ar724x: setup command register of the PCI controller
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Date: Sun, 3 Feb 2013 14:52:47 +0000
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Subject: [PATCH] MIPS: pci-ar724x: setup command register of the PCI
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controller
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commit 12401fc28d40aa5bf8bda6991a96b6d7a3dae3ac upstream.
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The command register of the PCI controller is
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not initialized correctly by the bootloader on
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some boards and this leads to non working PCI
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bus.
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Add code to initialize the command register
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from the Linux code to avoid this.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4916/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/pci.c | 10 +++-
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 +
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arch/mips/pci/pci-ar724x.c | 63 ++++++++++++++++++++++++
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3 files changed, 74 insertions(+), 1 deletions(-)
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3 files changed, 74 insertions(+), 1 deletion(-)
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--- a/arch/mips/ath79/pci.c
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+++ b/arch/mips/ath79/pci.c
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@@ -137,13 +137,14 @@ static struct platform_device *
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@@ -139,13 +139,14 @@ static struct platform_device *
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ath79_register_pci_ar724x(int id,
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unsigned long cfg_base,
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unsigned long ctrl_base,
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@ -28,7 +41,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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memset(res, 0, sizeof(res));
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@@ -171,6 +172,11 @@ ath79_register_pci_ar724x(int id,
|
||||
@@ -173,6 +174,11 @@ ath79_register_pci_ar724x(int id,
|
||||
res[4].start = io_base;
|
||||
res[4].end = io_base;
|
||||
|
||||
|
@ -40,7 +53,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
pdev = platform_device_register_simple("ar724x-pci", id,
|
||||
res, ARRAY_SIZE(res));
|
||||
return pdev;
|
||||
@@ -186,6 +192,7 @@ int __init ath79_register_pci(void)
|
||||
@@ -188,6 +194,7 @@ int __init ath79_register_pci(void)
|
||||
pdev = ath79_register_pci_ar724x(-1,
|
||||
AR724X_PCI_CFG_BASE,
|
||||
AR724X_PCI_CTRL_BASE,
|
||||
|
@ -48,7 +61,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
AR724X_PCI_MEM_BASE,
|
||||
AR724X_PCI_MEM_SIZE,
|
||||
0,
|
||||
@@ -201,6 +208,7 @@ int __init ath79_register_pci(void)
|
||||
@@ -203,6 +210,7 @@ int __init ath79_register_pci(void)
|
||||
pdev = ath79_register_pci_ar724x(-1,
|
||||
AR724X_PCI_CFG_BASE,
|
||||
AR724X_PCI_CTRL_BASE,
|
|
@ -1,24 +1,21 @@
|
|||
From 6c3ef689e4364dca74eaaecd72384be09e5a6bc8 Mon Sep 17 00:00:00 2001
|
||||
From 0f0f7d810226c734141a20de85289dbb0dda8f96 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 25 Jun 2012 09:19:08 +0200
|
||||
Subject: [PATCH 14/34] MIPS: pci-ar71xx: use dynamically allocated PCI controller structure
|
||||
Date: Thu, 7 Feb 2013 19:28:14 +0000
|
||||
Subject: [PATCH] MIPS: pci-ar71xx: use dynamically allocated PCI controller
|
||||
structure
|
||||
|
||||
commit f18118a868f1f7e7bdfea176a204fcc44fae2985 upstream.
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4926/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/pci/pci-ar71xx.c | 84 +++++++++++++++++++++++++++----------------
|
||||
1 files changed, 53 insertions(+), 31 deletions(-)
|
||||
arch/mips/pci/pci-ar71xx.c | 84 ++++++++++++++++++++++++++++----------------
|
||||
1 file changed, 53 insertions(+), 31 deletions(-)
|
||||
|
||||
--- a/arch/mips/pci/pci-ar71xx.c
|
||||
+++ b/arch/mips/pci/pci-ar71xx.c
|
||||
@@ -20,6 +20,7 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
+#include <linux/slab.h>
|
||||
|
||||
#include <asm/mach-ath79/ar71xx_regs.h>
|
||||
#include <asm/mach-ath79/ath79.h>
|
||||
@@ -48,8 +49,12 @@
|
||||
@@ -48,8 +48,12 @@
|
||||
|
||||
#define AR71XX_PCI_IRQ_COUNT 5
|
||||
|
||||
|
@ -33,7 +30,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
|
||||
/* Byte lane enable bits */
|
||||
static const u8 ar71xx_pci_ble_table[4][4] = {
|
||||
@@ -92,9 +97,18 @@ static inline u32 ar71xx_pci_bus_addr(st
|
||||
@@ -92,9 +96,18 @@ static inline u32 ar71xx_pci_bus_addr(st
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -54,7 +51,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
u32 pci_err;
|
||||
u32 ahb_err;
|
||||
|
||||
@@ -129,9 +143,10 @@ static int ar71xx_pci_check_error(int qu
|
||||
@@ -129,9 +142,10 @@ static int ar71xx_pci_check_error(int qu
|
||||
return !!(ahb_err | pci_err);
|
||||
}
|
||||
|
||||
|
@ -67,7 +64,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
u32 ad_cbe;
|
||||
|
||||
value = value << (8 * (where & 3));
|
||||
@@ -147,7 +162,8 @@ static inline int ar71xx_pci_set_cfgaddr
|
||||
@@ -147,7 +161,8 @@ static inline int ar71xx_pci_set_cfgaddr
|
||||
unsigned int devfn,
|
||||
int where, int size, u32 cmd)
|
||||
{
|
||||
|
@ -77,7 +74,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
u32 addr;
|
||||
|
||||
addr = ar71xx_pci_bus_addr(bus, devfn, where);
|
||||
@@ -156,13 +172,14 @@ static inline int ar71xx_pci_set_cfgaddr
|
||||
@@ -156,13 +171,14 @@ static inline int ar71xx_pci_set_cfgaddr
|
||||
__raw_writel(cmd | ar71xx_pci_get_ble(where, size, 0),
|
||||
base + AR71XX_PCI_REG_CFG_CBE);
|
||||
|
||||
|
@ -94,7 +91,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
unsigned long flags;
|
||||
u32 data;
|
||||
int err;
|
||||
@@ -171,7 +188,7 @@ static int ar71xx_pci_read_config(struct
|
||||
@@ -171,7 +187,7 @@ static int ar71xx_pci_read_config(struct
|
||||
ret = PCIBIOS_SUCCESSFUL;
|
||||
data = ~0;
|
||||
|
||||
|
@ -103,7 +100,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
|
||||
err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
|
||||
AR71XX_PCI_CFG_CMD_READ);
|
||||
@@ -180,7 +197,7 @@ static int ar71xx_pci_read_config(struct
|
||||
@@ -180,7 +196,7 @@ static int ar71xx_pci_read_config(struct
|
||||
else
|
||||
data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA);
|
||||
|
||||
|
@ -112,7 +109,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
|
||||
*value = (data >> (8 * (where & 3))) & ar71xx_pci_read_mask[size & 7];
|
||||
|
||||
@@ -190,7 +207,8 @@ static int ar71xx_pci_read_config(struct
|
||||
@@ -190,7 +206,8 @@ static int ar71xx_pci_read_config(struct
|
||||
static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 value)
|
||||
{
|
||||
|
@ -122,7 +119,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
unsigned long flags;
|
||||
int err;
|
||||
int ret;
|
||||
@@ -198,7 +216,7 @@ static int ar71xx_pci_write_config(struc
|
||||
@@ -198,7 +215,7 @@ static int ar71xx_pci_write_config(struc
|
||||
value = value << (8 * (where & 3));
|
||||
ret = PCIBIOS_SUCCESSFUL;
|
||||
|
||||
|
@ -131,7 +128,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
|
||||
err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size,
|
||||
AR71XX_PCI_CFG_CMD_WRITE);
|
||||
@@ -207,7 +225,7 @@ static int ar71xx_pci_write_config(struc
|
||||
@@ -207,7 +224,7 @@ static int ar71xx_pci_write_config(struc
|
||||
else
|
||||
__raw_writel(value, base + AR71XX_PCI_REG_CFG_WRDATA);
|
||||
|
||||
|
@ -140,7 +137,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
|
||||
return ret;
|
||||
}
|
||||
@@ -231,12 +249,6 @@ static struct resource ar71xx_pci_mem_re
|
||||
@@ -231,12 +248,6 @@ static struct resource ar71xx_pci_mem_re
|
||||
.flags = IORESOURCE_MEM
|
||||
};
|
||||
|
||||
|
@ -153,7 +150,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
void __iomem *base = ath79_reset_base;
|
||||
@@ -294,7 +306,7 @@ static struct irq_chip ar71xx_pci_irq_ch
|
||||
@@ -294,7 +305,7 @@ static struct irq_chip ar71xx_pci_irq_ch
|
||||
.irq_mask_ack = ar71xx_pci_irq_mask,
|
||||
};
|
||||
|
||||
|
@ -162,7 +159,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
{
|
||||
void __iomem *base = ath79_reset_base;
|
||||
int i;
|
||||
@@ -309,7 +321,7 @@ static void ar71xx_pci_irq_init(int irq)
|
||||
@@ -309,7 +320,7 @@ static void ar71xx_pci_irq_init(int irq)
|
||||
irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
|
||||
handle_level_irq);
|
||||
|
||||
|
@ -171,7 +168,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
}
|
||||
|
||||
static void ar71xx_pci_reset(void)
|
||||
@@ -336,20 +348,26 @@ static void ar71xx_pci_reset(void)
|
||||
@@ -336,20 +347,27 @@ static void ar71xx_pci_reset(void)
|
||||
|
||||
static int ar71xx_pci_probe(struct platform_device *pdev)
|
||||
{
|
||||
|
@ -180,7 +177,8 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||
- int irq;
|
||||
u32 t;
|
||||
|
||||
+ apc = kzalloc(sizeof(struct ar71xx_pci_controller), GFP_KERNEL);
|
||||
+ apc = devm_kzalloc(&pdev->dev, sizeof(struct ar71xx_pci_controller),
|
||||
+ GFP_KERNEL);
|
||||
+ if (!apc)
|
||||
+ return -ENOMEM;
|
||||
+
|
|
@ -0,0 +1,113 @@
|
|||
From f073cb029873ed487e14784d3682b6aa25afe997 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Thu, 7 Feb 2013 19:28:15 +0000
|
||||
Subject: [PATCH] MIPS: pci-ar71xx: remove static PCI IO/MEM resources
|
||||
|
||||
commit 42cb60d1fab4c81ef24876d985e08fc5bb899e41 upstream.
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4927/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/ath79/pci.c | 12 +++++++++++-
|
||||
arch/mips/pci/pci-ar71xx.c | 40 ++++++++++++++++++++++++----------------
|
||||
2 files changed, 35 insertions(+), 17 deletions(-)
|
||||
|
||||
--- a/arch/mips/ath79/pci.c
|
||||
+++ b/arch/mips/ath79/pci.c
|
||||
@@ -117,7 +117,7 @@ static struct platform_device *
|
||||
ath79_register_pci_ar71xx(void)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
- struct resource res[2];
|
||||
+ struct resource res[4];
|
||||
|
||||
memset(res, 0, sizeof(res));
|
||||
|
||||
@@ -130,6 +130,16 @@ ath79_register_pci_ar71xx(void)
|
||||
res[1].start = ATH79_CPU_IRQ_IP2;
|
||||
res[1].end = ATH79_CPU_IRQ_IP2;
|
||||
|
||||
+ res[2].name = "io_base";
|
||||
+ res[2].flags = IORESOURCE_IO;
|
||||
+ res[2].start = 0;
|
||||
+ res[2].end = 0;
|
||||
+
|
||||
+ res[3].name = "mem_base";
|
||||
+ res[3].flags = IORESOURCE_MEM;
|
||||
+ res[3].start = AR71XX_PCI_MEM_BASE;
|
||||
+ res[3].end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1;
|
||||
+
|
||||
pdev = platform_device_register_simple("ar71xx-pci", -1,
|
||||
res, ARRAY_SIZE(res));
|
||||
return pdev;
|
||||
--- a/arch/mips/pci/pci-ar71xx.c
|
||||
+++ b/arch/mips/pci/pci-ar71xx.c
|
||||
@@ -53,6 +53,8 @@ struct ar71xx_pci_controller {
|
||||
spinlock_t lock;
|
||||
int irq;
|
||||
struct pci_controller pci_ctrl;
|
||||
+ struct resource io_res;
|
||||
+ struct resource mem_res;
|
||||
};
|
||||
|
||||
/* Byte lane enable bits */
|
||||
@@ -234,20 +236,6 @@ static struct pci_ops ar71xx_pci_ops = {
|
||||
.write = ar71xx_pci_write_config,
|
||||
};
|
||||
|
||||
-static struct resource ar71xx_pci_io_resource = {
|
||||
- .name = "PCI IO space",
|
||||
- .start = 0,
|
||||
- .end = 0,
|
||||
- .flags = IORESOURCE_IO,
|
||||
-};
|
||||
-
|
||||
-static struct resource ar71xx_pci_mem_resource = {
|
||||
- .name = "PCI memory space",
|
||||
- .start = AR71XX_PCI_MEM_BASE,
|
||||
- .end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1,
|
||||
- .flags = IORESOURCE_MEM
|
||||
-};
|
||||
-
|
||||
static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
void __iomem *base = ath79_reset_base;
|
||||
@@ -370,6 +358,26 @@ static int ar71xx_pci_probe(struct platf
|
||||
if (apc->irq < 0)
|
||||
return -EINVAL;
|
||||
|
||||
+ res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
|
||||
+ if (!res)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ apc->io_res.parent = res;
|
||||
+ apc->io_res.name = "PCI IO space";
|
||||
+ apc->io_res.start = res->start;
|
||||
+ apc->io_res.end = res->end;
|
||||
+ apc->io_res.flags = IORESOURCE_IO;
|
||||
+
|
||||
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
|
||||
+ if (!res)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ apc->mem_res.parent = res;
|
||||
+ apc->mem_res.name = "PCI memory space";
|
||||
+ apc->mem_res.start = res->start;
|
||||
+ apc->mem_res.end = res->end;
|
||||
+ apc->mem_res.flags = IORESOURCE_MEM;
|
||||
+
|
||||
ar71xx_pci_reset();
|
||||
|
||||
/* setup COMMAND register */
|
||||
@@ -383,8 +391,8 @@ static int ar71xx_pci_probe(struct platf
|
||||
ar71xx_pci_irq_init(apc);
|
||||
|
||||
apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
|
||||
- apc->pci_ctrl.mem_resource = &ar71xx_pci_mem_resource;
|
||||
- apc->pci_ctrl.io_resource = &ar71xx_pci_io_resource;
|
||||
+ apc->pci_ctrl.mem_resource = &apc->mem_res;
|
||||
+ apc->pci_ctrl.io_resource = &apc->io_res;
|
||||
|
||||
register_pci_controller(&apc->pci_ctrl);
|
||||
|
|
@ -0,0 +1,105 @@
|
|||
From bec8339e917651e51592dd57ed005f8ccd9b0e8d Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Thu, 7 Feb 2013 19:29:38 +0000
|
||||
Subject: [PATCH] MIPS: pci-ar71xx: move irq base to the controller structure
|
||||
|
||||
commit 326e8d17d73fdf213f6334917ef46b2ba7b1354a upstream.
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Patchwork: http://patchwork.linux-mips.org/patch/4928/
|
||||
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||||
---
|
||||
arch/mips/pci/pci-ar71xx.c | 32 ++++++++++++++++++++++++--------
|
||||
1 file changed, 24 insertions(+), 8 deletions(-)
|
||||
|
||||
--- a/arch/mips/pci/pci-ar71xx.c
|
||||
+++ b/arch/mips/pci/pci-ar71xx.c
|
||||
@@ -52,6 +52,7 @@ struct ar71xx_pci_controller {
|
||||
void __iomem *cfg_base;
|
||||
spinlock_t lock;
|
||||
int irq;
|
||||
+ int irq_base;
|
||||
struct pci_controller pci_ctrl;
|
||||
struct resource io_res;
|
||||
struct resource mem_res;
|
||||
@@ -238,23 +239,26 @@ static struct pci_ops ar71xx_pci_ops = {
|
||||
|
||||
static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
+ struct ar71xx_pci_controller *apc;
|
||||
void __iomem *base = ath79_reset_base;
|
||||
u32 pending;
|
||||
|
||||
+ apc = irq_get_handler_data(irq);
|
||||
+
|
||||
pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
|
||||
__raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
|
||||
|
||||
if (pending & AR71XX_PCI_INT_DEV0)
|
||||
- generic_handle_irq(ATH79_PCI_IRQ(0));
|
||||
+ generic_handle_irq(apc->irq_base + 0);
|
||||
|
||||
else if (pending & AR71XX_PCI_INT_DEV1)
|
||||
- generic_handle_irq(ATH79_PCI_IRQ(1));
|
||||
+ generic_handle_irq(apc->irq_base + 1);
|
||||
|
||||
else if (pending & AR71XX_PCI_INT_DEV2)
|
||||
- generic_handle_irq(ATH79_PCI_IRQ(2));
|
||||
+ generic_handle_irq(apc->irq_base + 2);
|
||||
|
||||
else if (pending & AR71XX_PCI_INT_CORE)
|
||||
- generic_handle_irq(ATH79_PCI_IRQ(4));
|
||||
+ generic_handle_irq(apc->irq_base + 4);
|
||||
|
||||
else
|
||||
spurious_interrupt();
|
||||
@@ -262,10 +266,14 @@ static void ar71xx_pci_irq_handler(unsig
|
||||
|
||||
static void ar71xx_pci_irq_unmask(struct irq_data *d)
|
||||
{
|
||||
- unsigned int irq = d->irq - ATH79_PCI_IRQ_BASE;
|
||||
+ struct ar71xx_pci_controller *apc;
|
||||
+ unsigned int irq;
|
||||
void __iomem *base = ath79_reset_base;
|
||||
u32 t;
|
||||
|
||||
+ apc = irq_data_get_irq_chip_data(d);
|
||||
+ irq = d->irq - apc->irq_base;
|
||||
+
|
||||
t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
|
||||
__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
|
||||
|
||||
@@ -275,10 +283,14 @@ static void ar71xx_pci_irq_unmask(struct
|
||||
|
||||
static void ar71xx_pci_irq_mask(struct irq_data *d)
|
||||
{
|
||||
- unsigned int irq = d->irq - ATH79_PCI_IRQ_BASE;
|
||||
+ struct ar71xx_pci_controller *apc;
|
||||
+ unsigned int irq;
|
||||
void __iomem *base = ath79_reset_base;
|
||||
u32 t;
|
||||
|
||||
+ apc = irq_data_get_irq_chip_data(d);
|
||||
+ irq = d->irq - apc->irq_base;
|
||||
+
|
||||
t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
|
||||
__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
|
||||
|
||||
@@ -303,11 +315,15 @@ static void ar71xx_pci_irq_init(struct a
|
||||
|
||||
BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT);
|
||||
|
||||
- for (i = ATH79_PCI_IRQ_BASE;
|
||||
- i < ATH79_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
|
||||
+ apc->irq_base = ATH79_PCI_IRQ_BASE;
|
||||
+ for (i = apc->irq_base;
|
||||
+ i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) {
|
||||
irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
|
||||
handle_level_irq);
|
||||
+ irq_set_chip_data(i, apc);
|
||||
+ }
|
||||
|
||||
+ irq_set_handler_data(apc->irq, apc);
|
||||
irq_set_chained_handler(apc->irq, ar71xx_pci_irq_handler);
|
||||
}
|
||||
|
|
@ -1,70 +0,0 @@
|
|||
From 7dc3ccb5dc972b06c41b309653d132beaaedeb37 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 25 Jun 2012 09:52:23 +0200
|
||||
Subject: [PATCH 15/34] MIPS: pci-ar71xx: remove static PCI controller resources
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
---
|
||||
arch/mips/pci/pci-ar71xx.c | 30 ++++++++++++++----------------
|
||||
1 files changed, 14 insertions(+), 16 deletions(-)
|
||||
|
||||
--- a/arch/mips/pci/pci-ar71xx.c
|
||||
+++ b/arch/mips/pci/pci-ar71xx.c
|
||||
@@ -54,6 +54,8 @@ struct ar71xx_pci_controller {
|
||||
spinlock_t lock;
|
||||
int irq;
|
||||
struct pci_controller pci_ctrl;
|
||||
+ struct resource io_res;
|
||||
+ struct resource mem_res;
|
||||
};
|
||||
|
||||
/* Byte lane enable bits */
|
||||
@@ -235,20 +237,6 @@ static struct pci_ops ar71xx_pci_ops = {
|
||||
.write = ar71xx_pci_write_config,
|
||||
};
|
||||
|
||||
-static struct resource ar71xx_pci_io_resource = {
|
||||
- .name = "PCI IO space",
|
||||
- .start = 0,
|
||||
- .end = 0,
|
||||
- .flags = IORESOURCE_IO,
|
||||
-};
|
||||
-
|
||||
-static struct resource ar71xx_pci_mem_resource = {
|
||||
- .name = "PCI memory space",
|
||||
- .start = AR71XX_PCI_MEM_BASE,
|
||||
- .end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1,
|
||||
- .flags = IORESOURCE_MEM
|
||||
-};
|
||||
-
|
||||
static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
void __iomem *base = ath79_reset_base;
|
||||
@@ -370,6 +358,16 @@ static int ar71xx_pci_probe(struct platf
|
||||
if (apc->irq < 0)
|
||||
return -EINVAL;
|
||||
|
||||
+ apc->io_res.name = "PCI IO space";
|
||||
+ apc->io_res.start = 0;
|
||||
+ apc->io_res.end = 0;
|
||||
+ apc->io_res.flags = IORESOURCE_IO;
|
||||
+
|
||||
+ apc->mem_res.name = "PCI memory space";
|
||||
+ apc->mem_res.start = AR71XX_PCI_MEM_BASE;
|
||||
+ apc->mem_res.end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1;
|
||||
+ apc->mem_res.flags = IORESOURCE_MEM;
|
||||
+
|
||||
ar71xx_pci_reset();
|
||||
|
||||
/* setup COMMAND register */
|
||||
@@ -383,8 +381,8 @@ static int ar71xx_pci_probe(struct platf
|
||||
ar71xx_pci_irq_init(apc);
|
||||
|
||||
apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
|
||||
- apc->pci_ctrl.mem_resource = &ar71xx_pci_mem_resource;
|
||||
- apc->pci_ctrl.io_resource = &ar71xx_pci_io_resource;
|
||||
+ apc->pci_ctrl.mem_resource = &apc->mem_res;
|
||||
+ apc->pci_ctrl.io_resource = &apc->io_res;
|
||||
|
||||
register_pci_controller(&apc->pci_ctrl);
|
||||
|
|
@ -54,7 +54,7 @@ Subject: [PATCH 26/34] MIPS: ath79: add PCI controller registration code for the
|
|||
} else {
|
||||
pr_crit("pci %s: invalid irq map\n",
|
||||
pci_name((struct pci_dev *) dev));
|
||||
@@ -215,6 +233,24 @@ int __init ath79_register_pci(void)
|
||||
@@ -225,6 +243,24 @@ int __init ath79_register_pci(void)
|
||||
AR724X_PCI_MEM_SIZE,
|
||||
0,
|
||||
ATH79_IP2_IRQ(0));
|
||||
|
|
|
@ -58,7 +58,7 @@
|
|||
static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = {
|
||||
{
|
||||
.slot = 17,
|
||||
@@ -202,12 +206,50 @@ ath79_register_pci_ar724x(int id,
|
||||
@@ -212,12 +216,50 @@ ath79_register_pci_ar724x(int id,
|
||||
return pdev;
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue