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ar71xx: fixup onboard PCIe chip registration on the DB120 board 

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29022 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Gabor Juhos 2011-11-13 12:48:03 +00:00
parent 23823d7a65
commit 81359fd675
3 changed files with 36 additions and 6 deletions
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30
target/linux/ar71xx/files/arch/mips/ar71xx/dev-db120-pci.c
View File

@ -2,6 +2,7 @@
* Atheros db120 reference board PCI initialization
*
* Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
*
* Parts of this file are based on Atheros linux 2.6.31 BSP
*
@ -11,12 +12,18 @@
*/
#include <linux/pci.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/pci.h>
#include "dev-db120-pci.h"
static struct ath9k_platform_data db120_wmac_data = {
.led_pin = -1,
};
static char db120_wmac_mac[6];
static struct ar71xx_pci_irq db120_pci_irqs[] __initdata = {
{
.slot = 0,
@ -25,7 +32,28 @@ static struct ar71xx_pci_irq db120_pci_irqs[] __initdata = {
}
};
void __init db120_pci_init(void)
static int db120_pci_plat_dev_init(struct pci_dev *dev)
{
switch (PCI_SLOT(dev->devfn)) {
case 0:
dev->dev.platform_data = &db120_wmac_data;
break;
}
return 0;
}
void __init db120_pci_init(u8 *cal_data, u8 *mac_addr)
{
if (cal_data)
memcpy(db120_wmac_data.eeprom_data, cal_data,
sizeof(db120_wmac_data.eeprom_data));
if (mac_addr) {
memcpy(db120_wmac_mac, mac_addr, sizeof(db120_wmac_mac));
db120_wmac_data.macaddr = db120_wmac_mac;
}
ar71xx_pci_plat_dev_init = db120_pci_plat_dev_init;
ar71xx_pci_init(ARRAY_SIZE(db120_pci_irqs), db120_pci_irqs);
}

5
target/linux/ar71xx/files/arch/mips/ar71xx/dev-db120-pci.h
View File

@ -2,6 +2,7 @@
* Atheros DB120 reference board PCI initialization
*
* Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
*
* Parts of this file are based on Atheros linux 2.6.31 BSP
*
@ -14,9 +15,9 @@
#define _AR71XX_DEV_DB120_PCI_H
#if defined(CONFIG_AR71XX_DEV_DB120_PCI)
void db120_pci_init(void);
void db120_pci_init(u8 *cal_data, u8 *mac_addr);
#else
static inline void db120_pci_init(void) { }
static inline void db120_pci_init(u8 *cal_data, u8 *mac_addr) { }
#endif
#endif /* _AR71XX_DEV_DB120_PCI_H */

7
target/linux/ar71xx/files/arch/mips/ar71xx/mach-db120.c
View File

@ -32,7 +32,8 @@
#define DB120_MAC0_OFFSET 0
#define DB120_MAC1_OFFSET 6
#define DB120_CALDATA_OFFSET 0x1000
#define DB120_WMAC_CALDATA_OFFSET 0x1000
#define DB120_PCIE_CALDATA_OFFSET 0x5000
#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
@ -145,9 +146,9 @@ static void __init db120_setup(void)
ar71xx_add_device_eth(1);
ar9xxx_add_device_wmac(art + DB120_CALDATA_OFFSET, NULL);
ar9xxx_add_device_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL);
db120_pci_init();
db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL);
}
MIPS_MACHINE(AR71XX_MACH_DB120, "DB120", "Atheros DB120", db120_setup);