ar71xx: don't hardwire cpu_has_dsp{,2} to zero
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37845 3c298f89-4303-0410-b956-a3cf2f4a3e73master
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@ -0,0 +1,31 @@
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From c9da75bfa6cd7a47f5b2a1d183d34c165a06dd1a Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Thu, 22 Aug 2013 11:15:18 +0200
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Subject: [PATCH] MIPS: ath79: don't hardwire cpu_has_dsp{2} to 0
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The ath79 code supports various SoCs which are using either a 24Kc
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or a 74Kc core. The 74Kc core has DSP support, so don't hardwire
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the values to zero.
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Commit 00dc5ce2a653a332190aa29b2e1f3bceaa7d5b8d (MIPS: ath79: don't
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hardcode the unavailability of the DSP ASE) has fixed this already,
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but that change got reverted by 475032564ed96c94c085e3e7a90e07d150a7cec9
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(MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.)
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Reported-by: Helmut Schaa <helmut.schaa@googlemail.com>
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h | 2 --
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1 file changed, 2 deletions(-)
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--- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
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+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
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@@ -42,8 +42,6 @@
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#define cpu_has_mips64r1 0
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#define cpu_has_mips64r2 0
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-#define cpu_has_dsp 0
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-#define cpu_has_dsp2 0
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#define cpu_has_mipsmt 0
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#define cpu_has_64bits 0
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@ -8,15 +8,15 @@
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#define cpu_has_mips32r1 1
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#define cpu_has_mips32r1 1
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#define cpu_has_mips32r2 1
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#define cpu_has_mips32r2 1
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@@ -45,6 +46,7 @@
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@@ -43,6 +44,7 @@
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#define cpu_has_dsp 0
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#define cpu_has_mips64r2 0
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#define cpu_has_dsp2 0
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#define cpu_has_mipsmt 0
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#define cpu_has_mipsmt 0
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+#define cpu_has_userlocal 0
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+#define cpu_has_userlocal 0
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#define cpu_has_64bits 0
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#define cpu_has_64bits 0
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#define cpu_has_64bit_zero_reg 0
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#define cpu_has_64bit_zero_reg 0
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@@ -53,5 +55,9 @@
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@@ -51,5 +53,9 @@
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#define cpu_dcache_line_size() 32
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#define cpu_dcache_line_size() 32
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#define cpu_icache_line_size() 32
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#define cpu_icache_line_size() 32
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