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ar71xx: use a dummy irq chip for WMAC and PCIe irq hadling 

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29107 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Gabor Juhos 2011-11-14 11:49:51 +00:00
parent a921ab0827
commit 546895e938
4 changed files with 50 additions and 2 deletions
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2
target/linux/ar71xx/files/arch/mips/ar71xx/dev-ar9xxx-wmac.c
View File

@ -114,6 +114,8 @@ static void ar934x_wmac_init(void)
ar9xxx_wmac_device.name = "ar934x_wmac";
ar9xxx_wmac_resources[0].start = AR934X_WMAC_BASE;
ar9xxx_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
ar9xxx_wmac_resources[1].start = AR934X_IP2_IRQ_WMAC;
ar9xxx_wmac_resources[1].start = AR934X_IP2_IRQ_WMAC;
if (ar71xx_ref_freq == MHZ_25)
ar9xxx_wmac_data.is_clk_25mhz = true;
}

38
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
View File

@ -231,6 +231,39 @@ static void __init ar71xx_misc_irq_init(void)
setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
}
static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
{
u32 status;
disable_irq_nosync(irq);
status = ar71xx_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);
if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL)
generic_handle_irq(AR934X_IP2_IRQ_PCIE);
else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL)
generic_handle_irq(AR934X_IP2_IRQ_WMAC);
else
spurious_interrupt();
enable_irq(irq);
}
static void ar934x_ip2_irq_init(void)
{
int i;
for (i = AR934X_IP2_IRQ_BASE;
i < AR934X_IP2_IRQ_BASE + AR934X_IP2_IRQ_COUNT; i++)
irq_set_chip_and_handler(i, &dummy_irq_chip,
handle_level_irq);
irq_set_chained_handler(AR71XX_CPU_IRQ_IP2, ar934x_ip2_irq_dispatch);
}
/*
* The IP2/IP3 lines are tied to a PCI/WMAC/USB device. Drivers for
* these devices typically allocate coherent DMA memory, however the
@ -372,6 +405,11 @@ void __init arch_init_irq(void)
ar71xx_misc_irq_init();
if (ar71xx_soc == AR71XX_SOC_AR9341 ||
ar71xx_soc == AR71XX_SOC_AR9342 ||
ar71xx_soc == AR71XX_SOC_AR9344)
ar934x_ip2_irq_init();
cp0_perfcount_irq = AR71XX_MISC_IRQ_PERFC;
ar71xx_gpio_irq_init();

5
target/linux/ar71xx/files/arch/mips/ar71xx/pci.c
View File

@ -81,9 +81,12 @@ int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
ret = ar724x_pcibios_init(AR71XX_CPU_IRQ_IP2);
break;
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
ret = ar724x_pcibios_init(AR71XX_CPU_IRQ_IP2);
ret = ar724x_pcibios_init(AR934X_IP2_IRQ_PCIE);
break;
default:

7
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
View File

@ -89,7 +89,9 @@
#define AR71XX_GPIO_IRQ_BASE 40
#define AR71XX_GPIO_IRQ_COUNT 32
#define AR71XX_PCI_IRQ_BASE 72
#define AR71XX_PCI_IRQ_COUNT 8
#define AR71XX_PCI_IRQ_COUNT 6
#define AR934X_IP2_IRQ_BASE 78
#define AR934X_IP2_IRQ_COUNT 2
#define AR71XX_CPU_IRQ_IP2 (AR71XX_CPU_IRQ_BASE + 2)
#define AR71XX_CPU_IRQ_USB (AR71XX_CPU_IRQ_BASE + 3)
@ -119,6 +121,9 @@
#define AR71XX_PCI_IRQ_DEV2 (AR71XX_PCI_IRQ_BASE + 2)
#define AR71XX_PCI_IRQ_CORE (AR71XX_PCI_IRQ_BASE + 4)
#define AR934X_IP2_IRQ_WMAC (AR934X_IP2_IRQ_BASE + 0)
#define AR934X_IP2_IRQ_PCIE (AR934X_IP2_IRQ_BASE + 1)
extern u32 ar71xx_ahb_freq;
extern u32 ar71xx_cpu_freq;
extern u32 ar71xx_ddr_freq;