atheros[uart]: use 32-bit aligned I/O
Use 32-bit aligned I/O and update base UART address (remove +3 offset). Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@41699 3c298f89-4303-0410-b956-a3cf2f4a3e73master
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6c0e82e860
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4294c6bb6c
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@ -766,7 +766,7 @@
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+#define AR2315_LOCAL 0x10400000 /* LOCAL BUS MMR */
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+#define AR2315_ENET0 0x10500000 /* ETHERNET MMR */
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+#define AR2315_DSLBASE 0x11000000 /* RESET CONTROL MMR */
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+#define AR2315_UART0 0x11100003 /* UART MMR */
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+#define AR2315_UART0 0x11100000 /* UART MMR */
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+#define AR2315_SPI_MMR 0x11300000 /* SPI FLASH MMR */
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+#define AR2315_PCIEXT 0x80000000 /* pci external */
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+
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@ -1385,7 +1385,7 @@
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+#define AR531X_FLASHCTL 0x18400000
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+#define AR531X_APBBASE 0x1c000000
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+#define AR531X_FLASH 0x1e000000
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+#define AR531X_UART0 0xbc000003 /* UART MMR */
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+#define AR531X_UART0 0xbc000000 /* UART MMR */
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+
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+/*
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+ * AR531X_NUM_ENET_MAC defines the number of ethernet MACs that
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@ -3007,7 +3007,7 @@
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+ memset(&s, 0, sizeof(s));
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+
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+ s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
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+ s.iotype = UPIO_MEM;
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+ s.iotype = UPIO_MEM32;
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+ s.irq = irq;
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+ s.regshift = 2;
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+ s.mapbase = mapbase;
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@ -21,12 +21,12 @@
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+static inline void prom_uart_wr(void __iomem *base, unsigned reg,
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+ unsigned char ch)
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+{
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+ __raw_writeb(ch, base + 4 * reg);
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+ __raw_writel(ch, base + 4 * reg);
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+}
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+
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+static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg)
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+{
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+ return __raw_readb(base + 4 * reg);
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+ return __raw_readl(base + 4 * reg);
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+}
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+
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+void prom_putchar(unsigned char ch)
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