lantiq: sync spi-xway driver with trunk r47770
Signed-off-by: Felix Fietkau <nbd@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/branches/chaos_calmer@47792 3c298f89-4303-0410-b956-a3cf2f4a3e73master
Felix Fietkau
parent
69c87b4f14
commit
367c051787
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@ -42,7 +42,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+obj-$(CONFIG_SPI_XWAY) += spi-xway.o
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--- /dev/null
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+++ b/drivers/spi/spi-xway.c
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@@ -0,0 +1,975 @@
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@@ -0,0 +1,1003 @@
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+/*
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+ * Lantiq SoC SPI controller
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+ *
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@ -184,8 +184,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+
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+#define LTQ_SPI_IRNEN_F BIT(3) /* Frame end interrupt request */
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+#define LTQ_SPI_IRNEN_E BIT(2) /* Error end interrupt request */
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+#define LTQ_SPI_IRNEN_T BIT(1) /* Transmit end interrupt request */
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+#define LTQ_SPI_IRNEN_R BIT(0) /* Receive end interrupt request */
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+#define LTQ_SPI_IRNEN_T BIT(0) /* Transmit end interrupt request */
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+#define LTQ_SPI_IRNEN_R BIT(1) /* Receive end interrupt request */
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+#define LTQ_SPI_IRNEN_T_XWAY BIT(1) /* Transmit end interrupt request */
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+#define LTQ_SPI_IRNEN_R_XWAY BIT(0) /* Receive end interrupt request */
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+#define LTQ_SPI_IRNEN_ALL 0xF
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+
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+struct ltq_spi {
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@ -214,6 +216,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ u16 rxfs;
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+ unsigned dma_support:1;
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+ unsigned cfg_mode:1;
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+
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+ u32 irnen_t;
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+ u32 irnen_r;
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+};
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+
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+static inline struct ltq_spi *ltq_spi_to_hw(struct spi_device *spi)
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@ -517,6 +522,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+{
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+ struct ltq_spi *hw = ltq_spi_to_hw(spi);
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+
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+ if (ltq_spi_wait_ready(hw))
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+ dev_err(&spi->dev, "wait failed\n");
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+
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+ switch (cs) {
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+ case BITBANG_CS_ACTIVE:
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+ ltq_spi_bits_per_word_set(spi);
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@ -547,8 +555,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ if (bits_per_word > 32)
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+ return -EINVAL;
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+
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+ ltq_spi_config_mode_set(hw);
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+
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+ return 0;
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+}
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+
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@ -661,10 +667,22 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+static void ltq_spi_rxreq_set(struct ltq_spi *hw)
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+{
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+ u32 rxreq, rxreq_max, rxtodo;
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+ u32 fstat, fifo_fill;
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+
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+ rxtodo = ltq_spi_reg_read(hw, LTQ_SPI_RXCNT) & LTQ_SPI_RXCNT_TODO_MASK;
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+
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+ /*
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+ * Check if there is remaining data in the FIFO before starting a new
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+ * receive request. The controller might have processed some more data
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+ * since the last FIFO poll.
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+ */
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+ fstat = ltq_spi_reg_read(hw, LTQ_SPI_FSTAT);
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+ fifo_fill = ((fstat >> LTQ_SPI_FSTAT_RXFFL_SHIFT)
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+ & LTQ_SPI_FSTAT_RXFFL_MASK);
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+ if (fifo_fill)
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+ return;
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+
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+ /*
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+ * In RX-only mode the serial clock is activated only after writing
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+ * the expected amount of RX bytes into RXREQ register.
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+ * To avoid receive overflows at high clocks it is better to request
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@ -744,6 +762,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ /* Disable all interrupts */
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+ ltq_spi_reg_clearbit(hw, LTQ_SPI_IRNEN_ALL, LTQ_SPI_IRNEN);
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+
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+ dev_err(hw->dev, "error %x\n", ltq_spi_reg_read(hw, LTQ_SPI_STAT));
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+
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+ /* Clear all error flags */
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+ ltq_spi_reg_write(hw, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE);
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+
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@ -780,22 +800,22 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ if (hw->tx) {
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+ /* Initially fill TX FIFO with as much data as possible */
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+ ltq_spi_txfifo_write(hw);
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+ irq_flags |= LTQ_SPI_IRNEN_T;
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+ irq_flags |= hw->irnen_t;
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+
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+ /* Always enable RX interrupt in Full Duplex mode */
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+ if (hw->rx)
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+ irq_flags |= LTQ_SPI_IRNEN_R;
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+ irq_flags |= hw->irnen_r;
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+ } else if (hw->rx) {
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+ /* Start RX clock */
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+ ltq_spi_rxreq_set(hw);
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+
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+ /* Enable RX interrupt to receive data from RX FIFOs */
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+ irq_flags |= LTQ_SPI_IRNEN_R;
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+ irq_flags |= hw->irnen_r;
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+ }
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+
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+ /* Enable TX or RX interrupts */
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+ ltq_spi_reg_setbit(hw, irq_flags, LTQ_SPI_IRNEN);
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+ wait_for_completion_interruptible(&hw->done);
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+ wait_for_completion(&hw->done);
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+
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+ /* Disable all interrupts */
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+ ltq_spi_reg_clearbit(hw, LTQ_SPI_IRNEN_ALL, LTQ_SPI_IRNEN);
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@ -895,10 +915,18 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ hw->bitbang.setup_transfer = ltq_spi_setup_transfer;
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+ hw->bitbang.txrx_bufs = ltq_spi_txrx_bufs;
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+
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+ if (of_machine_is_compatible("lantiq,ase"))
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+ if (of_machine_is_compatible("lantiq,ase")) {
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+ master->num_chipselect = 3;
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+ else
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+
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+ hw->irnen_t = LTQ_SPI_IRNEN_T_XWAY;
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+ hw->irnen_r = LTQ_SPI_IRNEN_R_XWAY;
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+ } else {
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+ master->num_chipselect = 6;
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+
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+ hw->irnen_t = LTQ_SPI_IRNEN_T;
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+ hw->irnen_r = LTQ_SPI_IRNEN_R;
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+ }
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+
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+ master->bus_num = pdev->id;
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+ master->setup = ltq_spi_setup;
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+ master->cleanup = ltq_spi_cleanup;
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@ -913,7 +941,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ /* Read module capabilities */
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+ id = ltq_spi_reg_read(hw, LTQ_SPI_ID);
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+ hw->txfs = (id >> LTQ_SPI_ID_TXFS_SHIFT) & LTQ_SPI_ID_TXFS_MASK;
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+ hw->rxfs = (id >> LTQ_SPI_ID_TXFS_SHIFT) & LTQ_SPI_ID_TXFS_MASK;
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+ hw->rxfs = (id >> LTQ_SPI_ID_RXFS_SHIFT) & LTQ_SPI_ID_RXFS_MASK;
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+ hw->dma_support = (id & LTQ_SPI_ID_CFG) ? 1 : 0;
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+
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+ ltq_spi_config_mode_set(hw);
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