[s3c24xx] Add ioctls to glamo framebuffer driver to enable/disable glamo
engines. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16686 3c298f89-4303-0410-b956-a3cf2f4a3e73master
parent
e6c20cf7d5
commit
305591fbc4
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@ -0,0 +1,27 @@
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#ifndef __GLAMO_ENGINE_H
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#define __GLAMO_ENGINE_H
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enum glamo_engine {
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GLAMO_ENGINE_CAPTURE = 0,
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GLAMO_ENGINE_ISP = 1,
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GLAMO_ENGINE_JPEG = 2,
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GLAMO_ENGINE_MPEG_ENC = 3,
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GLAMO_ENGINE_MPEG_DEC = 4,
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GLAMO_ENGINE_LCD = 5,
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GLAMO_ENGINE_CMDQ = 6,
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GLAMO_ENGINE_2D = 7,
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GLAMO_ENGINE_3D = 8,
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GLAMO_ENGINE_MMC = 9,
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GLAMO_ENGINE_MICROP0 = 10,
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GLAMO_ENGINE_RISC = 11,
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GLAMO_ENGINE_MICROP1_MPEG_ENC = 12,
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GLAMO_ENGINE_MICROP1_MPEG_DEC = 13,
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#if 0
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GLAMO_ENGINE_H264_DEC = 14,
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GLAMO_ENGINE_RISC1 = 15,
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GLAMO_ENGINE_SPI = 16,
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#endif
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__NUM_GLAMO_ENGINES
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};
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#endif
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@ -1,8 +1,12 @@
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#ifndef _LINUX_GLAMOFB_H
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#define _LINUX_GLAMOFB_H
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#include <linux/spi/glamo.h>
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#include <linux/fb.h>
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#include <linux/glamo-engine.h>
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#ifdef __KERNEL__
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#include <linux/spi/glamo.h>
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struct glamo_core;
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@ -38,3 +42,9 @@ void glamo_lcm_reset(int level);
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#endif
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#endif
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#define GLAMOFB_ENGINE_ENABLE _IOW('F', 0x1, __u32)
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#define GLAMOFB_ENGINE_DISABLE _IOW('F', 0x2, __u32)
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#define GLAMOFB_ENGINE_RESET _IOW('F', 0x3, __u32)
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#endif
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@ -0,0 +1,23 @@
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--- a/include/linux/fb.h
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+++ b/include/linux/fb.h
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@@ -124,6 +124,7 @@ struct dentry;
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#define FB_ACCEL_TRIDENT_BLADE3D 52 /* Trident Blade3D */
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#define FB_ACCEL_TRIDENT_BLADEXP 53 /* Trident BladeXP */
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#define FB_ACCEL_CIRRUS_ALPINE 53 /* Cirrus Logic 543x/544x/5480 */
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+#define FB_ACCEL_GLAMO 50 /* SMedia Glamo */
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#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
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#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
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#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
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diff --git a/Kbuild b/Kbuild
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index 3f0eaa3..72699f0 100644
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--- a/include/linux/Kbuild
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+++ b/include/linux/Kbuild
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@@ -75,6 +75,8 @@ header-y += genetlink.h
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header-y += gen_stats.h
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header-y += gfs2_ondisk.h
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header-y += gigaset_dev.h
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+header-y += glamofb.h
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+header-y += glamo-engine.h
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header-y += hysdn_if.h
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header-y += i2o-dev.h
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header-y += i8k.h
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@ -536,6 +536,9 @@ int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
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__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
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GLAMO_HOSTBUS2_MMIO_EN_2D,
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GLAMO_HOSTBUS2_MMIO_EN_2D);
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__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
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GLAMO_CLOCK_GEN51_EN_DIV_GCLK,
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0xffff);
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break;
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case GLAMO_ENGINE_CMDQ:
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__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
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@ -543,10 +546,13 @@ int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
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__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
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GLAMO_HOSTBUS2_MMIO_EN_CQ,
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GLAMO_HOSTBUS2_MMIO_EN_CQ);
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__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
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GLAMO_CLOCK_GEN51_EN_DIV_MCLK,
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0xffff);
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break;
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/* FIXME: Implementation */
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default:
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break;
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return -EINVAL;
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}
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glamo->engine_enabled_bitfield |= 1 << engine;
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@ -589,17 +595,42 @@ int __glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
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break;
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case GLAMO_ENGINE_MMC:
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// __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC,
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// GLAMO_CLOCK_MMC_EN_M9CLK |
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// GLAMO_CLOCK_MMC_EN_TCLK |
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// GLAMO_CLOCK_MMC_DG_M9CLK |
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// GLAMO_CLOCK_MMC_DG_TCLK, 0);
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__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC,
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GLAMO_CLOCK_MMC_EN_M9CLK |
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GLAMO_CLOCK_MMC_EN_TCLK |
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GLAMO_CLOCK_MMC_DG_M9CLK |
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GLAMO_CLOCK_MMC_DG_TCLK, 0);
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/* disable the TCLK divider clk input */
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// __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
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// GLAMO_CLOCK_GEN51_EN_DIV_TCLK, 0);
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default:
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__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
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GLAMO_CLOCK_GEN51_EN_DIV_TCLK, 0);
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break;
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case GLAMO_ENGINE_CMDQ:
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__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
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GLAMO_CLOCK_2D_EN_M6CLK,
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0);
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__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
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GLAMO_HOSTBUS2_MMIO_EN_CQ,
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GLAMO_HOSTBUS2_MMIO_EN_CQ);
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/* __reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
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GLAMO_CLOCK_GEN51_EN_DIV_MCLK,
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0);*/
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break;
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case GLAMO_ENGINE_2D:
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__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
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GLAMO_CLOCK_2D_EN_M7CLK |
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GLAMO_CLOCK_2D_EN_GCLK |
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GLAMO_CLOCK_2D_DG_M7CLK |
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GLAMO_CLOCK_2D_DG_GCLK,
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0);
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__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
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GLAMO_HOSTBUS2_MMIO_EN_2D,
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GLAMO_HOSTBUS2_MMIO_EN_2D);
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__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
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GLAMO_CLOCK_GEN51_EN_DIV_GCLK,
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0);
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break;
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default:
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return -EINVAL;
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}
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glamo->engine_enabled_bitfield &= ~(1 << engine);
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@ -667,6 +698,9 @@ struct glamo_script reset_regs[] = {
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[GLAMO_ENGINE_MMC] = {
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GLAMO_REG_CLOCK_MMC, GLAMO_CLOCK_MMC_RESET
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},
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[GLAMO_ENGINE_CMDQ] = {
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GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_CQ_RESET
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},
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[GLAMO_ENGINE_2D] = {
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GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_RESET
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},
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@ -2,6 +2,7 @@
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#define __GLAMO_CORE_H
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#include <asm/system.h>
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#include <linux/glamo-engine.h>
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/* for the time being, we put the on-screen framebuffer into the lowest
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* VRAM space. This should make the code easily compatible with the various
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@ -40,29 +41,6 @@ struct glamo_script {
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int glamo_run_script(struct glamo_core *glamo,
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struct glamo_script *script, int len, int may_sleep);
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enum glamo_engine {
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GLAMO_ENGINE_CAPTURE,
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GLAMO_ENGINE_ISP,
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GLAMO_ENGINE_JPEG,
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GLAMO_ENGINE_MPEG_ENC,
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GLAMO_ENGINE_MPEG_DEC,
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GLAMO_ENGINE_LCD,
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GLAMO_ENGINE_CMDQ,
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GLAMO_ENGINE_2D,
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GLAMO_ENGINE_3D,
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GLAMO_ENGINE_MMC,
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GLAMO_ENGINE_MICROP0,
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GLAMO_ENGINE_RISC,
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GLAMO_ENGINE_MICROP1_MPEG_ENC,
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GLAMO_ENGINE_MICROP1_MPEG_DEC,
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#if 0
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GLAMO_ENGINE_H264_DEC,
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GLAMO_ENGINE_RISC1,
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GLAMO_ENGINE_SPI,
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#endif
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__NUM_GLAMO_ENGINES
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};
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struct glamo_mci_pdata {
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struct glamo_core * pglamo;
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unsigned int gpio_detect;
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@ -535,6 +535,31 @@ static int glamofb_setcolreg(unsigned regno,
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return 0;
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}
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static int glamofb_ioctl(struct fb_info *info, unsigned int cmd,
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unsigned long arg) {
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struct glamofb_handle *gfb = (struct glamofb_handle*)info->par;
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struct glamo_core *gcore = gfb->mach_info->glamo;
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int retval = -ENOTTY;
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switch (cmd) {
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case GLAMOFB_ENGINE_ENABLE:
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retval = glamo_engine_enable(gcore, arg);
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break;
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case GLAMOFB_ENGINE_DISABLE:
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retval = glamo_engine_disable(gcore, arg);
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break;
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case GLAMOFB_ENGINE_RESET:
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glamo_engine_reset(gcore, arg);
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retval = 0;
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break;
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default:
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break;
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}
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return retval;
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}
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#ifdef CONFIG_MFD_GLAMO_HWACCEL
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static inline void glamofb_vsync_wait(struct glamofb_handle *glamo,
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int line, int size, int range)
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.fb_set_par = glamofb_set_par,
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.fb_blank = glamofb_blank,
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.fb_setcolreg = glamofb_setcolreg,
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.fb_ioctl = glamofb_ioctl,
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#ifdef CONFIG_MFD_GLAMO_HWACCEL
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.fb_cursor = glamofb_cursor,
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#endif
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@ -19,13 +19,3 @@
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obj-$(CONFIG_HTC_EGPIO) += htc-egpio.o
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obj-$(CONFIG_HTC_PASIC3) += htc-pasic3.o
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--- a/include/linux/fb.h
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+++ b/include/linux/fb.h
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@@ -124,6 +124,7 @@ struct dentry;
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#define FB_ACCEL_TRIDENT_BLADE3D 52 /* Trident Blade3D */
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#define FB_ACCEL_TRIDENT_BLADEXP 53 /* Trident BladeXP */
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#define FB_ACCEL_CIRRUS_ALPINE 53 /* Cirrus Logic 543x/544x/5480 */
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+#define FB_ACCEL_GLAMO 50 /* SMedia Glamo */
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#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */
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#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */
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#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */
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