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gcc: merge a bugfix for a MIPS specific internal compiler error 

Signed-off-by: Felix Fietkau <nbd@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37621 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Felix Fietkau 2013-07-31 08:54:56 +00:00
parent 6578d45c34
commit 27b7bc42d6
2 changed files with 130 additions and 0 deletions
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65
toolchain/gcc/patches/4.6-linaro/040-gcc_bug_49696.patch Normal file
View File

@ -0,0 +1,65 @@
--- a/gcc/config/mips/sync.md
+++ b/gcc/config/mips/sync.md
@@ -136,7 +136,7 @@
[(match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")
(atomic_hiqi_op:SI (match_dup 0)
- (match_operand:SI 3 "register_operand" "dJ"))]
+ (match_operand:SI 3 "reg_or_0_operand" "dJ"))]
UNSPEC_SYNC_OLD_OP_12))
(clobber (match_scratch:SI 4 "=&d"))]
"GENERATE_LL_SC"
@@ -177,7 +177,7 @@
[(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
(atomic_hiqi_op:SI (match_dup 0)
- (match_operand:SI 4 "register_operand" "dJ"))]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ"))]
UNSPEC_SYNC_OLD_OP_12))
(clobber (match_scratch:SI 5 "=&d"))]
"GENERATE_LL_SC"
@@ -218,7 +218,7 @@
(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
(atomic_hiqi_op:SI (match_dup 0)
- (match_operand:SI 4 "register_operand" "dJ"))]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ"))]
UNSPEC_SYNC_NEW_OP_12))
(set (match_dup 1)
(unspec_volatile:SI
@@ -259,7 +259,7 @@
[(match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")
(match_dup 0)
- (match_operand:SI 3 "register_operand" "dJ")]
+ (match_operand:SI 3 "reg_or_0_operand" "dJ")]
UNSPEC_SYNC_OLD_OP_12))
(clobber (match_scratch:SI 4 "=&d"))]
"GENERATE_LL_SC"
@@ -298,7 +298,7 @@
(unspec_volatile:SI
[(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
- (match_operand:SI 4 "register_operand" "dJ")]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
UNSPEC_SYNC_OLD_OP_12))
(clobber (match_scratch:SI 5 "=&d"))]
"GENERATE_LL_SC"
@@ -337,7 +337,7 @@
[(match_operand:SI 1 "memory_operand" "+R")
(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
- (match_operand:SI 4 "register_operand" "dJ")]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
UNSPEC_SYNC_NEW_OP_12))
(set (match_dup 1)
(unspec_volatile:SI
@@ -546,7 +546,7 @@
(set (match_dup 1)
(unspec_volatile:SI [(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
- (match_operand:SI 4 "arith_operand" "dJ")]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
UNSPEC_SYNC_EXCHANGE_12))]
"GENERATE_LL_SC"
{ return mips_output_sync_loop (insn, operands); }

65
toolchain/gcc/patches/4.6.3/040-gcc_bug_49696.patch Normal file
View File

@ -0,0 +1,65 @@
--- a/gcc/config/mips/sync.md
+++ b/gcc/config/mips/sync.md
@@ -136,7 +136,7 @@
[(match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")
(atomic_hiqi_op:SI (match_dup 0)
- (match_operand:SI 3 "register_operand" "dJ"))]
+ (match_operand:SI 3 "reg_or_0_operand" "dJ"))]
UNSPEC_SYNC_OLD_OP_12))
(clobber (match_scratch:SI 4 "=&d"))]
"GENERATE_LL_SC"
@@ -177,7 +177,7 @@
[(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
(atomic_hiqi_op:SI (match_dup 0)
- (match_operand:SI 4 "register_operand" "dJ"))]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ"))]
UNSPEC_SYNC_OLD_OP_12))
(clobber (match_scratch:SI 5 "=&d"))]
"GENERATE_LL_SC"
@@ -218,7 +218,7 @@
(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
(atomic_hiqi_op:SI (match_dup 0)
- (match_operand:SI 4 "register_operand" "dJ"))]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ"))]
UNSPEC_SYNC_NEW_OP_12))
(set (match_dup 1)
(unspec_volatile:SI
@@ -259,7 +259,7 @@
[(match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")
(match_dup 0)
- (match_operand:SI 3 "register_operand" "dJ")]
+ (match_operand:SI 3 "reg_or_0_operand" "dJ")]
UNSPEC_SYNC_OLD_OP_12))
(clobber (match_scratch:SI 4 "=&d"))]
"GENERATE_LL_SC"
@@ -298,7 +298,7 @@
(unspec_volatile:SI
[(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
- (match_operand:SI 4 "register_operand" "dJ")]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
UNSPEC_SYNC_OLD_OP_12))
(clobber (match_scratch:SI 5 "=&d"))]
"GENERATE_LL_SC"
@@ -337,7 +337,7 @@
[(match_operand:SI 1 "memory_operand" "+R")
(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
- (match_operand:SI 4 "register_operand" "dJ")]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
UNSPEC_SYNC_NEW_OP_12))
(set (match_dup 1)
(unspec_volatile:SI
@@ -546,7 +546,7 @@
(set (match_dup 1)
(unspec_volatile:SI [(match_operand:SI 2 "register_operand" "d")
(match_operand:SI 3 "register_operand" "d")
- (match_operand:SI 4 "arith_operand" "dJ")]
+ (match_operand:SI 4 "reg_or_0_operand" "dJ")]
UNSPEC_SYNC_EXCHANGE_12))]
"GENERATE_LL_SC"
{ return mips_output_sync_loop (insn, operands); }