ar71xx: add preliminary support for the Atheros AR933x SoCs
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27054 3c298f89-4303-0410-b956-a3cf2f4a3e73master
parent
0518d27878
commit
23388b4cd9
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@ -178,6 +178,7 @@ CONFIG_SLUB=y
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CONFIG_SOC_AR71XX=y
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CONFIG_SOC_AR71XX=y
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CONFIG_SOC_AR724X=y
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CONFIG_SOC_AR724X=y
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CONFIG_SOC_AR913X=y
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CONFIG_SOC_AR913X=y
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# CONFIG_SOC_AR933X is not set
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CONFIG_SOC_AR934X=y
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CONFIG_SOC_AR934X=y
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CONFIG_SPI=y
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CONFIG_SPI=y
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CONFIG_SPI_AP83=y
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CONFIG_SPI_AP83=y
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@ -178,6 +178,7 @@ CONFIG_SLUB=y
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CONFIG_SOC_AR71XX=y
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CONFIG_SOC_AR71XX=y
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CONFIG_SOC_AR724X=y
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CONFIG_SOC_AR724X=y
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CONFIG_SOC_AR913X=y
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CONFIG_SOC_AR913X=y
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# CONFIG_SOC_AR933X is not set
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CONFIG_SOC_AR934X=y
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CONFIG_SOC_AR934X=y
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CONFIG_SPI=y
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CONFIG_SPI=y
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CONFIG_SPI_AP83=y
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CONFIG_SPI_AP83=y
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@ -393,4 +393,8 @@ config AR71XX_NVRAM
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config AR71XX_PCI_ATH9K_FIXUP
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config AR71XX_PCI_ATH9K_FIXUP
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def_bool n
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def_bool n
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config SOC_AR933X
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bool
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select USB_ARCH_HAS_EHCI
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endif
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endif
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@ -143,10 +143,16 @@ static void __init ar71xx_detect_sys_type(void)
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}
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}
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break;
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break;
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case REV_ID_MAJOR_AR9341:
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case REV_ID_MAJOR_AR9330:
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ar71xx_soc = AR71XX_SOC_AR9341;
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ar71xx_soc = AR71XX_SOC_AR9330;
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chip = "9341";
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chip = "9330";
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rev = id & AR934X_REV_ID_REVISION_MASK;
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rev = id & AR933X_REV_ID_REVISION_MASK;
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break;
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case REV_ID_MAJOR_AR9331:
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ar71xx_soc = AR71XX_SOC_AR9331;
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chip = "9331";
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rev = id & AR933X_REV_ID_REVISION_MASK;
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break;
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break;
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case REV_ID_MAJOR_AR9342:
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case REV_ID_MAJOR_AR9342:
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@ -127,6 +127,8 @@ enum ar71xx_soc_type {
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AR71XX_SOC_AR7242,
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AR71XX_SOC_AR7242,
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AR71XX_SOC_AR9130,
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AR71XX_SOC_AR9130,
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AR71XX_SOC_AR9132,
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AR71XX_SOC_AR9132,
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AR71XX_SOC_AR9330,
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AR71XX_SOC_AR9331,
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AR71XX_SOC_AR9341,
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AR71XX_SOC_AR9341,
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AR71XX_SOC_AR9342,
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AR71XX_SOC_AR9342,
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AR71XX_SOC_AR9344,
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AR71XX_SOC_AR9344,
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@ -641,6 +643,8 @@ void ar71xx_ddr_flush(u32 reg);
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#define REV_ID_MAJOR_AR7240 0x00c0
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#define REV_ID_MAJOR_AR7240 0x00c0
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#define REV_ID_MAJOR_AR7241 0x0100
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#define REV_ID_MAJOR_AR7241 0x0100
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#define REV_ID_MAJOR_AR7242 0x1100
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#define REV_ID_MAJOR_AR7242 0x1100
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#define REV_ID_MAJOR_AR9330 0x0110
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#define REV_ID_MAJOR_AR9331 0x1110
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#define REV_ID_MAJOR_AR9341 0x0120
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#define REV_ID_MAJOR_AR9341 0x0120
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#define REV_ID_MAJOR_AR9342 0x1120
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#define REV_ID_MAJOR_AR9342 0x1120
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#define REV_ID_MAJOR_AR9344 0x2120
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#define REV_ID_MAJOR_AR9344 0x2120
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@ -660,6 +664,8 @@ void ar71xx_ddr_flush(u32 reg);
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#define AR724X_REV_ID_REVISION_MASK 0x3
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#define AR724X_REV_ID_REVISION_MASK 0x3
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#define AR933X_REV_ID_REVISION_MASK 0xf
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#define AR934X_REV_ID_REVISION_MASK 0xf
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#define AR934X_REV_ID_REVISION_MASK 0xf
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extern void __iomem *ar71xx_reset_base;
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extern void __iomem *ar71xx_reset_base;
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