[kirkwood] Update kernel to 2.6.35

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22786 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Lars-Peter Clausen 2010-08-24 19:46:24 +00:00
parent 084ee7532b
commit 1b923e50a5
7 changed files with 51 additions and 321 deletions

View File

@ -11,7 +11,7 @@ BOARD:=kirkwood
BOARDNAME:=Marvell Kirkwood
FEATURES:=targz usb
LINUX_VERSION:=2.6.30.10
LINUX_VERSION:=2.6.35.3
include $(INCLUDE_DIR)/target.mk

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@ -1,23 +1,29 @@
# CONFIG_AEABI is not set
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_ARCH_CNS3XXX is not set
CONFIG_ARCH_KIRKWOOD=y
# CONFIG_ARCH_NUC93X is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_S5P6440 is not set
# CONFIG_ARCH_S5P6442 is not set
# CONFIG_ARCH_S5PC100 is not set
# CONFIG_ARCH_S5PV210 is not set
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SHMOBILE is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
# CONFIG_ARCH_VEXPRESS is not set
CONFIG_ARM=y
CONFIG_ARM_L1_CACHE_SHIFT=5
# CONFIG_ARM_THUMB is not set
# CONFIG_ARPD is not set
CONFIG_ATA=m
# CONFIG_BINARY_PRINTF is not set
CONFIG_BITREVERSE=y
CONFIG_CACHE_FEROCEON_L2=y
# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
CONFIG_CMDLINE="rootdelay=1 root=/dev/mmcblk0p1 noinitrd console=ttyS0,115200"
CONFIG_CPU_32=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
@ -29,7 +35,7 @@ CONFIG_CPU_FEROCEON=y
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_PABRT_NOIFAR=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_TLB_FEROCEON=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_USER is not set
@ -46,11 +52,13 @@ CONFIG_EXT3_FS=y
# CONFIG_FPE_FASTFPE is not set
# CONFIG_FPE_NWFPE is not set
CONFIG_FRAME_POINTER=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
# CONFIG_HAMRADIO is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
@ -61,11 +69,15 @@ CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HDLC=m
CONFIG_HDLC_CISCO=m
CONFIG_HDLC_FR=m
@ -83,28 +95,40 @@ CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
# CONFIG_ISDN_CAPI is not set
# CONFIG_ISDN_I4L is not set
CONFIG_JBD=y
CONFIG_LEDS_GPIO=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_MACH_DB88F6281_BP is not set
CONFIG_MACH_DOCKSTAR=y
# CONFIG_MACH_ESATA_SHEEVAPLUG is not set
# CONFIG_MACH_GURUPLUG is not set
# CONFIG_MACH_INETSPACE_V2 is not set
# CONFIG_MACH_MV88F6281GTW_GE is not set
# CONFIG_MACH_NET2BIG_V2 is not set
# CONFIG_MACH_NET5BIG_V2 is not set
# CONFIG_MACH_NETSPACE_V2 is not set
# CONFIG_MACH_OPENRD_BASE is not set
# CONFIG_MACH_OPENRD_CLIENT is not set
# CONFIG_MACH_RD88F6192_NAS is not set
# CONFIG_MACH_RD88F6281 is not set
CONFIG_MACH_SHEEVAPLUG=y
# CONFIG_MACH_TS219 is not set
# CONFIG_MACH_TS41X is not set
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_MVSDIO=y
# CONFIG_MMC_TIFM_SD is not set
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ORION=y
# CONFIG_MTD_ROOTFS_ROOT_DEV is not set
# CONFIG_MTD_ROOTFS_SPLIT is not set
# CONFIG_MTD_SM_COMMON is not set
CONFIG_MV643XX_ETH=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NET_DSA=y
# CONFIG_NET_DSA_MV88E6060 is not set
# CONFIG_NET_DSA_MV88E6123_61_65 is not set
@ -114,25 +138,26 @@ CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
CONFIG_NET_DSA_TAG_DSA=y
# CONFIG_NET_DSA_TAG_EDSA is not set
# CONFIG_NET_DSA_TAG_TRAILER is not set
# CONFIG_NO_IOPORT is not set
CONFIG_NLS=m
CONFIG_OUTER_CACHE=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PATA_ARTOP=m
CONFIG_PCI=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
CONFIG_PLAT_ORION=y
# CONFIG_PLAT_SPEAR is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_MV=y
CONFIG_SATA_PMP=y
CONFIG_SCSI=m
CONFIG_SCSI_MOD=m
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SDIO_UART is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SLOW_WORK is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TRACING_SUPPORT=y
CONFIG_UID16=y
CONFIG_USB=m
CONFIG_USB_EHCI_HCD=m

View File

@ -1,6 +1,6 @@
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -34,7 +34,7 @@ static struct mtd_partition sheevaplug_n
@@ -33,7 +33,7 @@ static struct mtd_partition sheevaplug_n
.offset = MTDPART_OFS_NXTBLK,
.size = SZ_4M
}, {

View File

@ -1,6 +1,6 @@
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -263,6 +263,15 @@ static int mmc_switch_hs(struct mmc_card
@@ -264,6 +264,15 @@ static int mmc_switch_hs(struct mmc_card
return -ENOMEM;
}
@ -18,7 +18,7 @@
goto out;
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -286,9 +286,9 @@ void mmc_set_data_timeout(struct mmc_dat
@@ -302,9 +302,9 @@ void mmc_set_data_timeout(struct mmc_dat
* The limit is really 250 ms, but that is
* insufficient for some crappy cards.
*/

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@ -1,132 +0,0 @@
From: Rabeeh Khoury <rabeeh@marvell.com>
Date: Sun, 22 Mar 2009 15:30:32 +0000 (+0200)
Subject: [ARM] Kirkwood: peripherals clock gating for power management
X-Git-Url: http://git.marvell.com/?p=orion.git;a=commitdiff_plain;h=c0c3df02efed0e5dea9aa4d8313e06e1f68f2cb4;hp=039b97666e1335eac517c7d35a0fa1143af689f0
[ARM] Kirkwood: peripherals clock gating for power management
1. Enabling clock gating of unused peripherals
2. PLL and PHY of the units are also disabled (when possible.
Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com>
[ This needs to be revisited to make power handling dynamic and per device. -- Nico ]
---
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -786,6 +786,38 @@ static void __init kirkwood_l2_init(void
#endif
}
+void __init kirkwood_clock_gate(u32 reg)
+{
+ printk(KERN_INFO "Kirkwood: Gating clock using mask 0x%x\n", reg);
+ /* First make sure that the units are accessible */
+ writel(readl(CLOCK_GATING_CTRL) | reg, CLOCK_GATING_CTRL);
+ /* For SATA first shutdown the phy */
+ if (reg & CGC_SATA0) {
+ /* Disable PLL and IVREF */
+ writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
+ /* Disable PHY */
+ writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
+ }
+ if (reg & CGC_SATA1) {
+ /* Disable PLL and IVREF */
+ writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
+ /* Disable PHY */
+ writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
+ }
+ /* For PCI-E first shutdown the phy */
+ if (reg & CGC_PEX0) {
+ writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
+ while (1) {
+ if (readl(PCIE_STATUS) & 0x1)
+ break;
+ }
+ writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
+ }
+ /* Now gate clock the required units */
+ writel(readl(CLOCK_GATING_CTRL) & ~reg, CLOCK_GATING_CTRL);
+ return;
+}
+
void __init kirkwood_init(void)
{
printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -22,6 +22,7 @@ struct mvsdio_platform_data;
void kirkwood_map_io(void);
void kirkwood_init(void);
void kirkwood_init_irq(void);
+void __init kirkwood_clock_gate(u32 reg);
extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
void kirkwood_setup_cpu_mbus(void);
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -39,4 +39,20 @@
#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
#define L2_WRITETHROUGH 0x00000010
+#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE | 0x11c)
+#define CGC_GE0 0x1
+#define CGC_PEX0 0x4
+#define CGC_USB0 0x8
+#define CGC_SDIO 0x10
+#define CGC_TSU 0x20
+#define CGC_NAND_SPI 0x80
+#define CGC_XOR0 0x100
+#define CGC_AUDIO 0x200
+#define CGC_SATA0 0x4000
+#define CGC_SATA1 0x8000
+#define CGC_XOR1 0x10000
+#define CGC_CRYPTO 0x20000
+#define CGC_GE1 0x80000
+#define CGC_TDM 0x100000
+
#endif
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -64,6 +64,8 @@
#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000)
+#define PCIE_LINK_CTRL (PCIE_VIRT_BASE | 0x70)
+#define PCIE_STATUS (PCIE_VIRT_BASE | 0x1a04)
#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
@@ -80,6 +82,11 @@
#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
+#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x80000)
+#define SATA0_IF_CTRL (SATA_VIRT_BASE | 0x2050)
+#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE | 0x2330)
+#define SATA1_IF_CTRL (SATA_VIRT_BASE | 0x4050)
+#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE | 0x4330)
#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
--- a/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++ b/arch/arm/mach-kirkwood/sheevaplug-setup.c
@@ -19,6 +19,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/kirkwood.h>
+#include <mach/bridge-regs.h>
#include <plat/mvsdio.h>
#include <plat/orion_nand.h>
#include "common.h"
@@ -122,6 +123,8 @@ static void __init sheevaplug_init(void)
platform_device_register(&sheevaplug_nand_flash);
platform_device_register(&sheevaplug_leds);
+ kirkwood_clock_gate(CGC_PEX0 | CGC_TSU | CGC_AUDIO | CGC_SATA0 |\
+ CGC_SATA1 | CGC_CRYPTO | CGC_GE1 | CGC_TDM);
}
MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")

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@ -1,146 +0,0 @@
From: Rabeeh Khoury <rabeeh@marvell.com>
Date: Tue, 24 Mar 2009 14:10:15 +0000 (+0200)
Subject: [ARM] Kirkwood: CPU idle driver
X-Git-Url: http://git.marvell.com/?p=orion.git;a=commitdiff_plain;h=039b97666e1335eac517c7d35a0fa1143af689f0;hp=56a50adda49b2020156616c4eb15353e0f9ad7de
[ARM] Kirkwood: CPU idle driver
The patch adds support for Kirkwood cpu idle.
Two idle states are defined:
1. Wait-for-interrupt (replacing default kirkwood wfi)
2. Wait-for-interrupt and DDR self refresh
Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
---
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -270,7 +270,9 @@ CONFIG_CMDLINE=""
#
# CPU Power Management
#
-# CONFIG_CPU_IDLE is not set
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
#
# Floating point emulation
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -5,3 +5,5 @@ obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88
obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
obj-$(CONFIG_MACH_TS219) += ts219-setup.o
+
+obj-$(CONFIG_CPU_IDLE) += cpuidle.o
--- /dev/null
+++ b/arch/arm/mach-kirkwood/cpuidle.c
@@ -0,0 +1,96 @@
+/*
+ * arch/arm/mach-kirkwood/cpuidle.c
+ *
+ * CPU idle Marvell Kirkwood SoCs
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * The cpu idle uses wait-for-interrupt and DDR self refresh in order
+ * to implement two idle states -
+ * #1 wait-for-interrupt
+ * #2 wait-for-interrupt and DDR self refresh
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/cpuidle.h>
+#include <asm/io.h>
+#include <asm/proc-fns.h>
+#include <mach/kirkwood.h>
+
+#define KIRKWOOD_MAX_STATES 2
+
+static struct cpuidle_driver kirkwood_idle_driver = {
+ .name = "kirkwood_idle",
+ .owner = THIS_MODULE,
+};
+
+static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
+
+/* Actual code that puts the SoC in different idle states */
+static int kirkwood_enter_idle(struct cpuidle_device *dev,
+ struct cpuidle_state *state)
+{
+ struct timeval before, after;
+ int idle_time;
+
+ local_irq_disable();
+ do_gettimeofday(&before);
+ if (state == &dev->states[0])
+ /* Wait for interrupt state */
+ cpu_do_idle();
+ else if (state == &dev->states[1]) {
+ /*
+ * Following write will put DDR in self refresh.
+ * Note that we have 256 cycles before DDR puts it
+ * self in self-refresh, so the wait-for-interrupt
+ * call afterwards won't get the DDR from self refresh
+ * mode.
+ */
+ writel(0x7, DDR_OPERATION_BASE);
+ cpu_do_idle();
+ }
+ do_gettimeofday(&after);
+ local_irq_enable();
+ idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
+ (after.tv_usec - before.tv_usec);
+ return idle_time;
+}
+
+/* Initialize CPU idle by registering the idle states */
+static int kirkwood_init_cpuidle(void)
+{
+ struct cpuidle_device *device;
+
+ cpuidle_register_driver(&kirkwood_idle_driver);
+
+ device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
+ device->state_count = KIRKWOOD_MAX_STATES;
+
+ /* Wait for interrupt state */
+ device->states[0].enter = kirkwood_enter_idle;
+ device->states[0].exit_latency = 1;
+ device->states[0].target_residency = 10000;
+ device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
+ strcpy(device->states[0].name, "WFI");
+ strcpy(device->states[0].desc, "Wait for interrupt");
+
+ /* Wait for interrupt and DDR self refresh state */
+ device->states[1].enter = kirkwood_enter_idle;
+ device->states[1].exit_latency = 10;
+ device->states[1].target_residency = 10000;
+ device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
+ strcpy(device->states[1].name, "DDR SR");
+ strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
+
+ if (cpuidle_register_device(device)) {
+ printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
+ return -EIO;
+ }
+ return 0;
+}
+
+device_initcall(kirkwood_init_cpuidle);
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -48,6 +48,7 @@
*/
#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
#define DDR_WINDOW_CPU_BASE (DDR_VIRT_BASE | 0x1500)
+#define DDR_OPERATION_BASE (DDR_VIRT_BASE | 0x1418)
#define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x10000)
#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x10000)

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@ -11,13 +11,11 @@ Signed-off-by: Eric Cooper <ecc@xxxxxxx>
4 files changed, 120 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-kirkwood/dockstar-setup.c
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 29b2163..74d832f 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -32,6 +32,12 @@ config MACH_TS219
@@ -99,6 +99,12 @@ config MACH_NET5BIG_V2
Say 'Y' here if you want your kernel to support the
QNAP TS-119 and TS-219 Turbo NAS devices.
LaCie 5Big Network v2 NAS.
+config MACH_DOCKSTAR
+ bool "Seagate FreeAgent DockStar"
@ -28,19 +26,16 @@ index 29b2163..74d832f 100644
endmenu
endif
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index c0cd5d3..025b256 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -6,4 +6,5 @@ obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o
@@ -5,6 +5,7 @@ obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88
obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o
obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
+obj-$(CONFIG_MACH_DOCKSTAR) += dockstar-setup.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
diff --git a/arch/arm/mach-kirkwood/dockstar-setup.c b/arch/arm/mach-kirkwood/dockstar-setup.c
new file mode 100644
index 0000000..a90475d
obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o
obj-$(CONFIG_MACH_GURUPLUG) += guruplug-setup.o
obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
--- /dev/null
+++ b/arch/arm/mach-kirkwood/dockstar-setup.c
@@ -0,0 +1,148 @@
@ -192,15 +187,3 @@ index 0000000..a90475d
+ .init_irq = kirkwood_init_irq,
+ .timer = &kirkwood_timer,
+MACHINE_END
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 48cbdcb..8d56837 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -2245,3 +2245,4 @@ davinci_dm365_dvr MACH_DAVINCI_DM365_DVR DAVINCI_DM365_DVR 2963
omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
simcom MACH_SIMCOM SIMCOM 2259
mcwebio MACH_MCWEBIO MCWEBIO 2260
+dockstar MACH_DOCKSTAR DOCKSTAR 2998
--
1.7.1