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generic: rtl8366: minor cleanup 

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@21985 3c298f89-4303-0410-b956-a3cf2f4a3e73
master
Gabor Juhos 2010-06-28 17:24:05 +00:00
parent f10a8dfb53
commit 19842ab5da
2 changed files with 16 additions and 22 deletions
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25
target/linux/generic/files/drivers/net/phy/rtl8366rb.c
View File

@ -27,10 +27,6 @@
#define RTL8366RB_PHY_PAGE_MAX 7 #define RTL8366RB_PHY_PAGE_MAX 7
#define RTL8366RB_PHY_ADDR_MAX 31 #define RTL8366RB_PHY_ADDR_MAX 31
#define RTL8366RB_CHIP_GLOBAL_CTRL_REG 0x0000
#define RTL8366RB_CHIP_CTRL_VLAN (1 << 13)
#define RTL8366RB_CHIP_CTRL_VLAN_4KTB (1 << 14)
/* Switch Global Configuration register */ /* Switch Global Configuration register */
#define RTL8366RB_SGCR 0x0000 #define RTL8366RB_SGCR 0x0000
#define RTL8366RB_SGCR_EN_BC_STORM_CTRL BIT(0) #define RTL8366RB_SGCR_EN_BC_STORM_CTRL BIT(0)
@ -40,6 +36,8 @@
#define RTL8366RB_SGCR_MAX_LENGTH_1536 RTL8366RB_SGCR_MAX_LENGTH(0x1) #define RTL8366RB_SGCR_MAX_LENGTH_1536 RTL8366RB_SGCR_MAX_LENGTH(0x1)
#define RTL8366RB_SGCR_MAX_LENGTH_1552 RTL8366RB_SGCR_MAX_LENGTH(0x2) #define RTL8366RB_SGCR_MAX_LENGTH_1552 RTL8366RB_SGCR_MAX_LENGTH(0x2)
#define RTL8366RB_SGCR_MAX_LENGTH_9216 RTL8366RB_SGCR_MAX_LENGTH(0x3) #define RTL8366RB_SGCR_MAX_LENGTH_9216 RTL8366RB_SGCR_MAX_LENGTH(0x3)
#define RTL8366RB_SGCR_EN_VLAN BIT(13)
#define RTL8366RB_SGCR_EN_VLAN_4KTB BIT(14)
/* Port Enable Control register */ /* Port Enable Control register */
#define RTL8366RB_PECR 0x0001 #define RTL8366RB_PECR 0x0001
@ -655,16 +653,15 @@ static int rtl8366rb_set_mc_index(struct rtl8366_smi *smi, int port, int index)
static int rtl8366rb_vlan_set_vlan(struct rtl8366_smi *smi, int enable) static int rtl8366rb_vlan_set_vlan(struct rtl8366_smi *smi, int enable)
{ {
return rtl8366_smi_rmwr(smi, RTL8366RB_CHIP_GLOBAL_CTRL_REG, return rtl8366_smi_rmwr(smi, RTL8366RB_SGCR, RTL8366RB_SGCR_EN_VLAN,
RTL8366RB_CHIP_CTRL_VLAN, (enable) ? RTL8366RB_SGCR_EN_VLAN : 0);
(enable) ? RTL8366RB_CHIP_CTRL_VLAN : 0);
} }
static int rtl8366rb_vlan_set_4ktable(struct rtl8366_smi *smi, int enable) static int rtl8366rb_vlan_set_4ktable(struct rtl8366_smi *smi, int enable)
{ {
return rtl8366_smi_rmwr(smi, RTL8366RB_CHIP_GLOBAL_CTRL_REG, return rtl8366_smi_rmwr(smi, RTL8366RB_SGCR,
RTL8366RB_CHIP_CTRL_VLAN_4KTB, RTL8366RB_SGCR_EN_VLAN_4KTB,
(enable) ? RTL8366RB_CHIP_CTRL_VLAN_4KTB : 0); (enable) ? RTL8366RB_SGCR_EN_VLAN_4KTB : 0);
} }
static int rtl8366rb_sw_reset_mibs(struct switch_dev *dev, static int rtl8366rb_sw_reset_mibs(struct switch_dev *dev,
@ -689,16 +686,16 @@ static int rtl8366rb_sw_get_vlan_enable(struct switch_dev *dev,
u32 data; u32 data;
if (attr->ofs == 1) { if (attr->ofs == 1) {
rtl8366_smi_read_reg(smi, RTL8366RB_CHIP_GLOBAL_CTRL_REG, &data); rtl8366_smi_read_reg(smi, RTL8366RB_SGCR, &data);
if (data & RTL8366RB_CHIP_CTRL_VLAN) if (data & RTL8366RB_SGCR_EN_VLAN)
val->value.i = 1; val->value.i = 1;
else else
val->value.i = 0; val->value.i = 0;
} else if (attr->ofs == 2) { } else if (attr->ofs == 2) {
rtl8366_smi_read_reg(smi, RTL8366RB_CHIP_GLOBAL_CTRL_REG, &data); rtl8366_smi_read_reg(smi, RTL8366RB_SGCR, &data);
if (data & RTL8366RB_CHIP_CTRL_VLAN_4KTB) if (data & RTL8366RB_SGCR_EN_VLAN_4KTB)
val->value.i = 1; val->value.i = 1;
else else
val->value.i = 0; val->value.i = 0;

13
target/linux/generic/files/drivers/net/phy/rtl8366s.c
View File

@ -27,9 +27,6 @@
#define RTL8366S_PHY_PAGE_MAX 7 #define RTL8366S_PHY_PAGE_MAX 7
#define RTL8366S_PHY_ADDR_MAX 31 #define RTL8366S_PHY_ADDR_MAX 31
#define RTL8366S_CHIP_GLOBAL_CTRL_REG 0x0000
#define RTL8366S_CHIP_CTRL_VLAN (1 << 13)
/* Switch Global Configuration register */ /* Switch Global Configuration register */
#define RTL8366S_SGCR 0x0000 #define RTL8366S_SGCR 0x0000
#define RTL8366S_SGCR_EN_BC_STORM_CTRL BIT(0) #define RTL8366S_SGCR_EN_BC_STORM_CTRL BIT(0)
@ -39,6 +36,7 @@
#define RTL8366S_SGCR_MAX_LENGTH_1536 RTL8366S_SGCR_MAX_LENGTH(0x1) #define RTL8366S_SGCR_MAX_LENGTH_1536 RTL8366S_SGCR_MAX_LENGTH(0x1)
#define RTL8366S_SGCR_MAX_LENGTH_1552 RTL8366S_SGCR_MAX_LENGTH(0x2) #define RTL8366S_SGCR_MAX_LENGTH_1552 RTL8366S_SGCR_MAX_LENGTH(0x2)
#define RTL8366S_SGCR_MAX_LENGTH_16000 RTL8366S_SGCR_MAX_LENGTH(0x3) #define RTL8366S_SGCR_MAX_LENGTH_16000 RTL8366S_SGCR_MAX_LENGTH(0x3)
#define RTL8366S_SGCR_EN_VLAN BIT(13)
/* Port Enable Control register */ /* Port Enable Control register */
#define RTL8366S_PECR 0x0001 #define RTL8366S_PECR 0x0001
@ -644,9 +642,8 @@ static int rtl8366s_set_mc_index(struct rtl8366_smi *smi, int port, int index)
static int rtl8366s_vlan_set_vlan(struct rtl8366_smi *smi, int enable) static int rtl8366s_vlan_set_vlan(struct rtl8366_smi *smi, int enable)
{ {
return rtl8366_smi_rmwr(smi, RTL8366S_CHIP_GLOBAL_CTRL_REG, return rtl8366_smi_rmwr(smi, RTL8366S_SGCR, RTL8366S_SGCR_EN_VLAN,
RTL8366S_CHIP_CTRL_VLAN, (enable) ? RTL8366S_SGCR_EN_VLAN : 0);
(enable) ? RTL8366S_CHIP_CTRL_VLAN : 0);
} }
static int rtl8366s_vlan_set_4ktable(struct rtl8366_smi *smi, int enable) static int rtl8366s_vlan_set_4ktable(struct rtl8366_smi *smi, int enable)
@ -676,9 +673,9 @@ static int rtl8366s_sw_get_vlan_enable(struct switch_dev *dev,
u32 data; u32 data;
if (attr->ofs == 1) { if (attr->ofs == 1) {
rtl8366_smi_read_reg(smi, RTL8366S_CHIP_GLOBAL_CTRL_REG, &data); rtl8366_smi_read_reg(smi, RTL8366S_SGCR, &data);
if (data & RTL8366S_CHIP_CTRL_VLAN) if (data & RTL8366S_SGCR_EN_VLAN)
val->value.i = 1; val->value.i = 1;
else else
val->value.i = 0; val->value.i = 0;