From 14f91a5fd544b399a93803c2bf7b9a86d37f7bc5 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Tue, 13 Mar 2012 17:29:31 +0000 Subject: [PATCH] ar71xx: fix a typo in ar71xx_regs.h git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30921 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h | 11 +++++++++++ .../213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h | 11 +++++++++++ 2 files changed, 22 insertions(+) create mode 100644 target/linux/ar71xx/patches-3.2/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h create mode 100644 target/linux/ar71xx/patches-3.3/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h diff --git a/target/linux/ar71xx/patches-3.2/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h b/target/linux/ar71xx/patches-3.2/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h new file mode 100644 index 0000000000..9069edd4d4 --- /dev/null +++ b/target/linux/ar71xx/patches-3.2/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h @@ -0,0 +1,11 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -313,7 +313,7 @@ + #define AR934X_RESET_USB_PHY_ANALOG BIT(11) + #define AR934X_RESET_HOST_DMA_INT BIT(10) + #define AR934X_RESET_GE0_MAC BIT(9) +-#define AR934X_RESET_ETH_SIWTCH BIT(8) ++#define AR934X_RESET_ETH_SWITCH BIT(8) + #define AR934X_RESET_PCIE_PHY BIT(7) + #define AR934X_RESET_PCIE BIT(6) + #define AR934X_RESET_USB_HOST BIT(5) diff --git a/target/linux/ar71xx/patches-3.3/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h b/target/linux/ar71xx/patches-3.3/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h new file mode 100644 index 0000000000..9069edd4d4 --- /dev/null +++ b/target/linux/ar71xx/patches-3.3/213-MIPS-ath79-fix-a-typo-in-ar71xx_regs.h @@ -0,0 +1,11 @@ +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -313,7 +313,7 @@ + #define AR934X_RESET_USB_PHY_ANALOG BIT(11) + #define AR934X_RESET_HOST_DMA_INT BIT(10) + #define AR934X_RESET_GE0_MAC BIT(9) +-#define AR934X_RESET_ETH_SIWTCH BIT(8) ++#define AR934X_RESET_ETH_SWITCH BIT(8) + #define AR934X_RESET_PCIE_PHY BIT(7) + #define AR934X_RESET_PCIE BIT(6) + #define AR934X_RESET_USB_HOST BIT(5)