[xburst] core fixes
* Mask timer irq on startup * Fix dma width constants * Do not try to ack intc irqs git-svn-id: svn://svn.openwrt.org/openwrt/trunk@21617 3c298f89-4303-0410-b956-a3cf2f4a3e73master
parent
1343492a6c
commit
0af48c7785
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@ -1,4 +1,4 @@
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From 7efb2cae3df49ba749860a0df04933dc522da224 Mon Sep 17 00:00:00 2001
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From e1828438bbdd0623cf7f9c6672f2fe65b1349aa6 Mon Sep 17 00:00:00 2001
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From: Lars-Peter Clausen <lars@metafoo.de>
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Date: Sat, 24 Apr 2010 17:35:05 +0200
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Subject: [PATCH] Add JZ4740 SoC core support
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@ -18,13 +18,13 @@ Subject: [PATCH] Add JZ4740 SoC core support
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arch/mips/include/asm/mach-jz4740/timer.h | 22 +
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arch/mips/include/asm/mach-jz4740/war.h | 25 +
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arch/mips/jz4740/Kconfig | 29 +
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arch/mips/jz4740/Makefile | 17 +
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arch/mips/jz4740/Makefile | 18 +
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arch/mips/jz4740/clock-debugfs.c | 109 +++
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arch/mips/jz4740/clock.c | 935 ++++++++++++++++++++++++++
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arch/mips/jz4740/clock.h | 75 ++
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arch/mips/jz4740/dma.c | 339 ++++++++++
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arch/mips/jz4740/dma.c | 336 +++++++++
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arch/mips/jz4740/gpio.c | 598 ++++++++++++++++
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arch/mips/jz4740/irq.c | 174 +++++
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arch/mips/jz4740/irq.c | 170 +++++
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arch/mips/jz4740/irq.h | 21 +
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arch/mips/jz4740/platform.c | 246 +++++++
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arch/mips/jz4740/pm.c | 59 ++
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@ -33,12 +33,12 @@ Subject: [PATCH] Add JZ4740 SoC core support
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arch/mips/jz4740/reset.c | 81 +++
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arch/mips/jz4740/reset.h | 7 +
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arch/mips/jz4740/setup.c | 64 ++
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arch/mips/jz4740/time.c | 145 ++++
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arch/mips/jz4740/timer.c | 45 ++
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arch/mips/jz4740/time.c | 144 ++++
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arch/mips/jz4740/timer.c | 48 ++
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arch/mips/jz4740/timer.h | 130 ++++
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arch/mips/kernel/cpu-probe.c | 20 +
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arch/mips/mm/tlbex.c | 5 +
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34 files changed, 4073 insertions(+), 1 deletions(-)
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34 files changed, 4069 insertions(+), 1 deletions(-)
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create mode 100644 arch/mips/include/asm/mach-jz4740/base.h
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create mode 100644 arch/mips/include/asm/mach-jz4740/clock.h
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create mode 100644 arch/mips/include/asm/mach-jz4740/dma.h
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@ -232,7 +232,7 @@ index 0000000..9069727
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+#endif
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diff --git a/arch/mips/include/asm/mach-jz4740/dma.h b/arch/mips/include/asm/mach-jz4740/dma.h
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new file mode 100644
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index 0000000..d31d4e0
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index 0000000..bb7fc1e
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-jz4740/dma.h
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@@ -0,0 +1,90 @@
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@ -272,9 +272,9 @@ index 0000000..d31d4e0
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+};
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+
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+enum jz4740_dma_width {
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+ JZ4740_DMA_WIDTH_8BIT,
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+ JZ4740_DMA_WIDTH_16BIT,
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+ JZ4740_DMA_WIDTH_32BIT,
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+ JZ4740_DMA_WIDTH_32BIT = 0,
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+ JZ4740_DMA_WIDTH_8BIT = 1,
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+ JZ4740_DMA_WIDTH_16BIT = 2,
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+};
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+
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+enum jz4740_dma_transfer_size {
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@ -928,14 +928,14 @@ index 0000000..3a5bc17
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+#endif /* __ASM_MIPS_MACH_JZ4740_WAR_H */
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diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig
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new file mode 100644
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index 0000000..5f6da09
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index 0000000..b959769
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--- /dev/null
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+++ b/arch/mips/jz4740/Kconfig
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@@ -0,0 +1,29 @@
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+choice
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+ prompt "Machine type"
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+ depends on MACH_JZ
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+ default JZ4740_QI_LB60
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+ prompt "Machine type"
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+ depends on MACH_JZ
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+ default JZ4740_QI_LB60
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+
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+endchoice
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+
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@ -963,10 +963,10 @@ index 0000000..5f6da09
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+ bool
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diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
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new file mode 100644
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index 0000000..e389ddd
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index 0000000..398ee91
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--- /dev/null
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+++ b/arch/mips/jz4740/Makefile
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@@ -0,0 +1,17 @@
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@@ -0,0 +1,18 @@
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+#
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+# Makefile for the Ingenic JZ4740.
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+#
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@ -982,8 +982,9 @@ index 0000000..e389ddd
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+
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+# PM support
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+
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+obj-$(CONFIG_PM) += pm.o
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+obj-$(CONFIG_PM) += pm.o
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+
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+EXTRA_CFLAGS += -Werror -Wall
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diff --git a/arch/mips/jz4740/clock-debugfs.c b/arch/mips/jz4740/clock-debugfs.c
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new file mode 100644
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index 0000000..993b91b
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@ -1101,7 +1102,7 @@ index 0000000..993b91b
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+}
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diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c
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new file mode 100644
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index 0000000..3954a20
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index 0000000..df0d6d3
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--- /dev/null
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+++ b/arch/mips/jz4740/clock.c
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@@ -0,0 +1,935 @@
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@ -1919,7 +1920,7 @@ index 0000000..3954a20
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+ struct clk *clk;
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+
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+ list_for_each_entry(clk, &jz_clocks, list) {
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+ if (strcmp(clk->name, name) == 0)
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+ if (strcmp(clk->name, name) == 0)
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+ return clk;
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+ }
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+ return ERR_PTR(-ENOENT);
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@ -2123,10 +2124,10 @@ index 0000000..96010a4
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+#endif
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diff --git a/arch/mips/jz4740/dma.c b/arch/mips/jz4740/dma.c
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new file mode 100644
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index 0000000..217ddc8
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index 0000000..b712afc
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--- /dev/null
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+++ b/arch/mips/jz4740/dma.c
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@@ -0,0 +1,339 @@
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@@ -0,0 +1,336 @@
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+/*
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+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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+ * JZ4740 SoC DMA support
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@ -2275,7 +2276,6 @@ index 0000000..217ddc8
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+ const struct jz4740_dma_config *config)
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+{
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+ uint32_t cmd;
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+ uint32_t ctrl;
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+
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+ switch (config->transfer_size) {
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+ case JZ4740_DMA_TRANSFER_SIZE_2BYTE:
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@ -2302,11 +2302,8 @@ index 0000000..217ddc8
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+ cmd |= config->mode << JZ_DMA_CMD_MODE_OFFSET;
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+ cmd |= JZ_DMA_CMD_TRANSFER_IRQ_ENABLE;
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+
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+ ctrl = JZ_DMA_STATUS_CTRL_NO_DESC;
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+ ctrl |= JZ_DMA_STATUS_CTRL_HALT;
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+
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+ jz4740_dma_write(JZ_REG_DMA_CMD(dma->id), cmd);
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+ jz4740_dma_write(JZ_REG_DMA_STATUS_CTRL(dma->id), ctrl);
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+ jz4740_dma_write(JZ_REG_DMA_STATUS_CTRL(dma->id), 0);
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+ jz4740_dma_write(JZ_REG_DMA_REQ_TYPE(dma->id), config->request_type);
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+}
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+EXPORT_SYMBOL_GPL(jz4740_dma_configure);
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@ -2348,12 +2345,13 @@ index 0000000..217ddc8
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+void jz4740_dma_enable(struct jz4740_dma_chan *dma)
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+{
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+ jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id),
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+ JZ_DMA_STATUS_CTRL_ENABLE,
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+ JZ_DMA_STATUS_CTRL_ENABLE | JZ_DMA_STATUS_CTRL_HALT);
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+ JZ_DMA_STATUS_CTRL_NO_DESC | JZ_DMA_STATUS_CTRL_ENABLE,
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+ JZ_DMA_STATUS_CTRL_HALT | JZ_DMA_STATUS_CTRL_NO_DESC |
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+ JZ_DMA_STATUS_CTRL_ENABLE);
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+
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+ jz4740_dma_write_mask(JZ_REG_DMA_CTRL,
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+ JZ_DMA_CTRL_ENABLE,
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+ JZ_DMA_CTRL_ENABLE | JZ_DMA_CTRL_HALT);
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+ JZ_DMA_CTRL_HALT | JZ_DMA_CTRL_ENABLE);
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+}
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+EXPORT_SYMBOL_GPL(jz4740_dma_enable);
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+
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@ -2468,7 +2466,7 @@ index 0000000..217ddc8
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+arch_initcall(jz4740_dma_init);
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diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c
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new file mode 100644
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index 0000000..14d8288
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index 0000000..84f4ef9
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--- /dev/null
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+++ b/arch/mips/jz4740/gpio.c
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@@ -0,0 +1,598 @@
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@ -2980,7 +2978,7 @@ index 0000000..14d8288
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+ ret = sysdev_register(&chip->sysdev);
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+
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+ if (ret)
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+ return ret;
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+ return ret;
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+
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+ spin_lock_init(&chip->lock);
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+
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@ -3011,7 +3009,7 @@ index 0000000..14d8288
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+ return ret;
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+
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+ for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) {
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+ jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i);
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+ jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i);
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+ }
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+
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+ printk(KERN_INFO "JZ4740 GPIO initalized\n");
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@ -3072,10 +3070,10 @@ index 0000000..14d8288
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+#endif
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diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c
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new file mode 100644
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index 0000000..a8c76af
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index 0000000..46a03ee
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--- /dev/null
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+++ b/arch/mips/jz4740/irq.c
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@@ -0,0 +1,174 @@
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@@ -0,0 +1,170 @@
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+/*
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+ * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
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+ * JZ4740 platform IRQ support
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@ -3131,11 +3129,6 @@ index 0000000..a8c76af
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+ writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_SET_MASK);
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+}
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+
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+static void intc_irq_ack(unsigned int irq)
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+{
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+ writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_PENDING);
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+}
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+
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+static int intc_irq_set_wake(unsigned int irq, unsigned int on)
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+{
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+ if (on)
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@ -3149,8 +3142,8 @@ index 0000000..a8c76af
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+static struct irq_chip intc_irq_type = {
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+ .name = "INTC",
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+ .mask = intc_irq_mask,
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+ .mask_ack = intc_irq_mask,
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+ .unmask = intc_irq_unmask,
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+ .ack = intc_irq_ack,
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+ .set_wake = intc_irq_set_wake,
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+};
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+
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@ -3160,6 +3153,7 @@ index 0000000..a8c76af
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+ int intc_irq;
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+
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+ irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING);
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+
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+ intc_irq = ffs(irq_reg);
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+ if (intc_irq)
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+ generic_handle_irq(intc_irq - 1 + JZ4740_IRQ_BASE);
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@ -4014,10 +4008,10 @@ index 0000000..a6628f4
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+}
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diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
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new file mode 100644
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index 0000000..7721ba7
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index 0000000..da8183f
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--- /dev/null
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+++ b/arch/mips/jz4740/time.c
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@@ -0,0 +1,145 @@
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@@ -0,0 +1,144 @@
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+/*
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+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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+ * JZ4740 platform time support
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@ -4074,7 +4068,7 @@ index 0000000..7721ba7
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+
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+ cd->event_handler(cd);
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+
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+ return IRQ_HANDLED;
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+ return IRQ_HANDLED;
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+}
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+
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+static void jz4740_clockevent_set_mode(enum clock_event_mode mode,
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|
@ -4120,7 +4114,7 @@ index 0000000..7721ba7
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+ .handler = jz4740_clockevent_irq,
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+ .flags = IRQF_PERCPU | IRQF_TIMER | IRQF_DISABLED,
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+ .name = "jz4740-timerirq",
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+ .dev_id = &jz4740_clockevent,
|
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+ .dev_id = &jz4740_clockevent,
|
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+};
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+
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+void __init plat_time_init(void)
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|
@ -4132,7 +4126,7 @@ index 0000000..7721ba7
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+ jz4740_timer_init();
|
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+
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+ clk_rate = jz4740_clock_bdata.ext_rate >> 4;
|
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+ jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
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+ jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
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+
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+ clockevent_set_clock(&jz4740_clockevent, clk_rate);
|
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+ jz4740_clockevent.min_delta_ns = clockevent_delta2ns(100, &jz4740_clockevent);
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|
@ -4145,7 +4139,7 @@ index 0000000..7721ba7
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+ ret = clocksource_register(&jz4740_clocksource);
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+
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+ if (ret)
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+ printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
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+ printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
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+
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+ setup_irq(JZ4740_IRQ_TCU0, &timer_irqaction);
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+
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|
@ -4155,9 +4149,8 @@ index 0000000..7721ba7
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+ jz4740_timer_set_ctrl(TIMER_CLOCKSOURCE, ctrl);
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+
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+ jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
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+ jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
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+ jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
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+
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+ jz4740_timer_irq_full_disable(TIMER_CLOCKSOURCE);
|
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+ jz4740_timer_set_period(TIMER_CLOCKSOURCE, 0xffff);
|
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+
|
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+ jz4740_timer_enable(TIMER_CLOCKEVENT);
|
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|
@ -4165,10 +4158,10 @@ index 0000000..7721ba7
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+}
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diff --git a/arch/mips/jz4740/timer.c b/arch/mips/jz4740/timer.c
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new file mode 100644
|
||||
index 0000000..208f14c
|
||||
index 0000000..6e09cae
|
||||
--- /dev/null
|
||||
+++ b/arch/mips/jz4740/timer.c
|
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@@ -0,0 +1,45 @@
|
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@@ -0,0 +1,48 @@
|
||||
+/*
|
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+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
|
||||
+ * JZ4740 platform timer support
|
||||
|
@ -4211,8 +4204,11 @@ index 0000000..208f14c
|
|||
+ if (!jz4740_timer_base)
|
||||
+ panic("Failed to ioremap timer registers");
|
||||
+
|
||||
+ /* Disable all timers except those used as system timers */
|
||||
+ writel(0x100fc, jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
|
||||
+ /* Disable all timer clocks except for those used as system timers */
|
||||
+ writel(0x000100fc, jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
|
||||
+
|
||||
+ /* Timer irqs are unmasked by default, mask them */
|
||||
+ writel(0x00ff00ff, jz4740_timer_base + JZ_REG_TIMER_MASK_SET);
|
||||
+}
|
||||
diff --git a/arch/mips/jz4740/timer.h b/arch/mips/jz4740/timer.h
|
||||
new file mode 100644
|
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|
|
|
@ -1,4 +1,4 @@
|
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From 876a111075de6fcffbaa0814ee4118ac739df1a9 Mon Sep 17 00:00:00 2001
|
||||
From eb15b4f5046dbb1a530ec3e6134b1b68753e1f31 Mon Sep 17 00:00:00 2001
|
||||
From: Lars-Peter Clausen <lars@metafoo.de>
|
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Date: Sat, 24 Apr 2010 17:24:26 +0200
|
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Subject: [PATCH] Add qi_lb60 board support
|
||||
|
@ -70,12 +70,12 @@ index 0000000..cfbf073
|
|||
+
|
||||
+#endif /* __ASM_JZ4740_QI_LB60_H__ */
|
||||
diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig
|
||||
index 5f6da09..3de3b99 100644
|
||||
index b959769..a255c1a 100644
|
||||
--- a/arch/mips/jz4740/Kconfig
|
||||
+++ b/arch/mips/jz4740/Kconfig
|
||||
@@ -3,6 +3,10 @@ choice
|
||||
depends on MACH_JZ
|
||||
default JZ4740_QI_LB60
|
||||
depends on MACH_JZ
|
||||
default JZ4740_QI_LB60
|
||||
|
||||
+config JZ4740_QI_LB60
|
||||
+ bool "Qi Hardware Ben NanoNote"
|
||||
|
@ -85,7 +85,7 @@ index 5f6da09..3de3b99 100644
|
|||
|
||||
config HAVE_PWM
|
||||
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
|
||||
index e389ddd..deca88e 100644
|
||||
index 398ee91..dd27b49 100644
|
||||
--- a/arch/mips/jz4740/Makefile
|
||||
+++ b/arch/mips/jz4740/Makefile
|
||||
@@ -11,6 +11,8 @@ obj-$(CONFIG_DEBUG_FS) += clock-debugfs.o
|
||||
|
@ -96,7 +96,7 @@ index e389ddd..deca88e 100644
|
|||
+
|
||||
# PM support
|
||||
|
||||
obj-$(CONFIG_PM) += pm.o
|
||||
obj-$(CONFIG_PM) += pm.o
|
||||
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
|
||||
new file mode 100644
|
||||
index 0000000..b3cc308
|
||||
|
|
Loading…
Reference in New Issue