33 lines
1.3 KiB
Diff
33 lines
1.3 KiB
Diff
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--- a/include/linux/bcma/bcma.h
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+++ b/include/linux/bcma/bcma.h
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@@ -134,6 +134,7 @@ struct bcma_host_ops {
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#define BCMA_CORE_I2S 0x834
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#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
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#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
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+#define BCMA_CORE_ARM_CR4 0x83e
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#define BCMA_CORE_DEFAULT 0xFFF
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#define BCMA_MAX_NR_CORES 16
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--- a/include/linux/bcma/bcma_regs.h
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+++ b/include/linux/bcma/bcma_regs.h
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@@ -37,6 +37,7 @@
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#define BCMA_IOST_BIST_DONE 0x8000
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#define BCMA_RESET_CTL 0x0800
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#define BCMA_RESET_CTL_RESET 0x0001
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+#define BCMA_RESET_ST 0x0804
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/* BCMA PCI config space registers. */
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#define BCMA_PCI_PMCSR 0x44
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--- a/include/linux/bcma/bcma_driver_chipcommon.h
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+++ b/include/linux/bcma/bcma_driver_chipcommon.h
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@@ -316,6 +316,9 @@
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#define BCMA_CC_PMU_CTL 0x0600 /* PMU control */
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#define BCMA_CC_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */
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#define BCMA_CC_PMU_CTL_ILP_DIV_SHIFT 16
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+#define BCMA_CC_PMU_CTL_RES 0x00006000 /* reset control mask */
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+#define BCMA_CC_PMU_CTL_RES_SHIFT 13
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+#define BCMA_CC_PMU_CTL_RES_RELOAD 0x2 /* reload POR values */
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#define BCMA_CC_PMU_CTL_PLL_UPD 0x00000400
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#define BCMA_CC_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */
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#define BCMA_CC_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */
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