265 lines
8.1 KiB
Diff
265 lines
8.1 KiB
Diff
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From 9f0c37b1d071355d4c027958f370823c8f891480 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 14 Mar 2012 10:29:26 +0100
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Subject: [PATCH 10/47] MIPS: ath79: replace ath724x to ar724x
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Replace the 'ath724x' to 'ar724x' in function, variable and
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structure names to reflect the name of the real SoC.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: René Bolldorf <xsecute@googlemail.com>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/3490/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/ath79/mach-ubnt-xm.c | 4 +-
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arch/mips/ath79/pci.c | 6 ++--
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arch/mips/ath79/pci.h | 10 +++---
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arch/mips/include/asm/mach-ath79/pci.h | 4 +-
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arch/mips/pci/pci-ar724x.c | 62 ++++++++++++++++----------------
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5 files changed, 43 insertions(+), 43 deletions(-)
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--- a/arch/mips/ath79/mach-ubnt-xm.c
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+++ b/arch/mips/ath79/mach-ubnt-xm.c
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@@ -84,7 +84,7 @@ static struct ath79_spi_platform_data ub
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#ifdef CONFIG_PCI
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static struct ath9k_platform_data ubnt_xm_eeprom_data;
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-static struct ath724x_pci_data ubnt_xm_pci_data[] = {
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+static struct ar724x_pci_data ubnt_xm_pci_data[] = {
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{
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.irq = UBNT_XM_PCI_IRQ,
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.pdata = &ubnt_xm_eeprom_data,
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@@ -108,7 +108,7 @@ static void __init ubnt_xm_init(void)
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memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
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sizeof(ubnt_xm_eeprom_data.eeprom_data));
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- ath724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
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+ ar724x_pci_add_data(ubnt_xm_pci_data, ARRAY_SIZE(ubnt_xm_pci_data));
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#endif /* CONFIG_PCI */
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ath79_register_pci();
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--- a/arch/mips/ath79/pci.c
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+++ b/arch/mips/ath79/pci.c
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@@ -13,10 +13,10 @@
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#include <asm/mach-ath79/pci.h>
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#include "pci.h"
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-static struct ath724x_pci_data *pci_data;
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+static struct ar724x_pci_data *pci_data;
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static int pci_data_size;
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-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
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+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size)
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{
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pci_data = data;
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pci_data_size = size;
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@@ -50,7 +50,7 @@ int pcibios_plat_dev_init(struct pci_dev
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int __init ath79_register_pci(void)
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{
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if (soc_is_ar724x())
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- return ath724x_pcibios_init();
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+ return ar724x_pcibios_init();
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return -ENODEV;
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}
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--- a/arch/mips/ath79/pci.h
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+++ b/arch/mips/ath79/pci.h
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@@ -8,15 +8,15 @@
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* by the Free Software Foundation.
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*/
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-#ifndef __ASM_MACH_ATH79_PCI_ATH724X_H
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-#define __ASM_MACH_ATH79_PCI_ATH724X_H
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+#ifndef _ATH79_PCI_H
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+#define _ATH79_PCI_H
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-struct ath724x_pci_data {
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+struct ar724x_pci_data {
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int irq;
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void *pdata;
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};
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-void ath724x_pci_add_data(struct ath724x_pci_data *data, int size);
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+void ar724x_pci_add_data(struct ar724x_pci_data *data, int size);
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#ifdef CONFIG_PCI
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int ath79_register_pci(void);
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@@ -24,4 +24,4 @@ int ath79_register_pci(void);
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static inline int ath79_register_pci(void) { return 0; }
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#endif
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-#endif /* __ASM_MACH_ATH79_PCI_ATH724X_H */
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+#endif /* _ATH79_PCI_H */
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--- a/arch/mips/include/asm/mach-ath79/pci.h
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+++ b/arch/mips/include/asm/mach-ath79/pci.h
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@@ -12,9 +12,9 @@
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#define __ASM_MACH_ATH79_PCI_H
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#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
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-int ath724x_pcibios_init(void);
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+int ar724x_pcibios_init(void);
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#else
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-static inline int ath724x_pcibios_init(void) { return 0; }
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+static inline int ar724x_pcibios_init(void) { return 0; }
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#endif
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#endif /* __ASM_MACH_ATH79_PCI_H */
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--- a/arch/mips/pci/pci-ar724x.c
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+++ b/arch/mips/pci/pci-ar724x.c
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@@ -14,13 +14,13 @@
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#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
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#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
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-#define ATH724X_PCI_DEV_BASE 0x14000000
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-#define ATH724X_PCI_MEM_BASE 0x10000000
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-#define ATH724X_PCI_MEM_SIZE 0x08000000
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+#define AR724X_PCI_DEV_BASE 0x14000000
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+#define AR724X_PCI_MEM_BASE 0x10000000
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+#define AR724X_PCI_MEM_SIZE 0x08000000
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-static DEFINE_SPINLOCK(ath724x_pci_lock);
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+static DEFINE_SPINLOCK(ar724x_pci_lock);
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-static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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+static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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int size, uint32_t *value)
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{
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unsigned long flags, addr, tval, mask;
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@@ -31,38 +31,38 @@ static int ath724x_pci_read(struct pci_b
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if (where & (size - 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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- spin_lock_irqsave(&ath724x_pci_lock, flags);
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+ spin_lock_irqsave(&ar724x_pci_lock, flags);
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switch (size) {
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case 1:
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addr = where & ~3;
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mask = 0xff000000 >> ((where % 4) * 8);
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- tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
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+ tval = reg_read(AR724X_PCI_DEV_BASE + addr);
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tval = tval & ~mask;
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*value = (tval >> ((4 - (where % 4))*8));
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break;
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case 2:
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addr = where & ~3;
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mask = 0xffff0000 >> ((where % 4)*8);
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- tval = reg_read(ATH724X_PCI_DEV_BASE + addr);
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+ tval = reg_read(AR724X_PCI_DEV_BASE + addr);
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tval = tval & ~mask;
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*value = (tval >> ((4 - (where % 4))*8));
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break;
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case 4:
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- *value = reg_read(ATH724X_PCI_DEV_BASE + where);
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+ *value = reg_read(AR724X_PCI_DEV_BASE + where);
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break;
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default:
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- spin_unlock_irqrestore(&ath724x_pci_lock, flags);
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+ spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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- spin_unlock_irqrestore(&ath724x_pci_lock, flags);
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+ spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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return PCIBIOS_SUCCESSFUL;
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}
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-static int ath724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
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+static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
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int size, uint32_t value)
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{
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unsigned long flags, tval, addr, mask;
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@@ -73,11 +73,11 @@ static int ath724x_pci_write(struct pci_
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if (where & (size - 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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- spin_lock_irqsave(&ath724x_pci_lock, flags);
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+ spin_lock_irqsave(&ar724x_pci_lock, flags);
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switch (size) {
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case 1:
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- addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
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+ addr = (AR724X_PCI_DEV_BASE + where) & ~3;
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mask = 0xff000000 >> ((where % 4)*8);
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tval = reg_read(addr);
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tval = tval & ~mask;
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@@ -85,7 +85,7 @@ static int ath724x_pci_write(struct pci_
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reg_write(addr, tval);
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break;
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case 2:
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- addr = (ATH724X_PCI_DEV_BASE + where) & ~3;
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+ addr = (AR724X_PCI_DEV_BASE + where) & ~3;
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mask = 0xffff0000 >> ((where % 4)*8);
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tval = reg_read(addr);
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tval = tval & ~mask;
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@@ -93,47 +93,47 @@ static int ath724x_pci_write(struct pci_
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reg_write(addr, tval);
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break;
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case 4:
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- reg_write((ATH724X_PCI_DEV_BASE + where), value);
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+ reg_write((AR724X_PCI_DEV_BASE + where), value);
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break;
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default:
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- spin_unlock_irqrestore(&ath724x_pci_lock, flags);
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+ spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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- spin_unlock_irqrestore(&ath724x_pci_lock, flags);
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+ spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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return PCIBIOS_SUCCESSFUL;
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}
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-static struct pci_ops ath724x_pci_ops = {
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- .read = ath724x_pci_read,
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- .write = ath724x_pci_write,
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+static struct pci_ops ar724x_pci_ops = {
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+ .read = ar724x_pci_read,
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+ .write = ar724x_pci_write,
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};
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-static struct resource ath724x_io_resource = {
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+static struct resource ar724x_io_resource = {
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.name = "PCI IO space",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_IO,
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};
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-static struct resource ath724x_mem_resource = {
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+static struct resource ar724x_mem_resource = {
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.name = "PCI memory space",
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- .start = ATH724X_PCI_MEM_BASE,
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- .end = ATH724X_PCI_MEM_BASE + ATH724X_PCI_MEM_SIZE - 1,
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+ .start = AR724X_PCI_MEM_BASE,
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+ .end = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,
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.flags = IORESOURCE_MEM,
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};
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-static struct pci_controller ath724x_pci_controller = {
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- .pci_ops = &ath724x_pci_ops,
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- .io_resource = &ath724x_io_resource,
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- .mem_resource = &ath724x_mem_resource,
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+static struct pci_controller ar724x_pci_controller = {
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+ .pci_ops = &ar724x_pci_ops,
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+ .io_resource = &ar724x_io_resource,
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+ .mem_resource = &ar724x_mem_resource,
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};
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-int __init ath724x_pcibios_init(void)
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+int __init ar724x_pcibios_init(void)
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{
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- register_pci_controller(&ath724x_pci_controller);
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+ register_pci_controller(&ar724x_pci_controller);
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return PCIBIOS_SUCCESSFUL;
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}
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