40 lines
1.2 KiB
Diff
40 lines
1.2 KiB
Diff
|
From d6af8f27223a244d74ab44842bdec707c97cfe55 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
||
|
|
Date: Mon, 12 Aug 2013 14:14:48 -0300
|
||
|
|
Subject: [PATCH 115/203] mtd: nand: pxa3xx: Handle ECC and DMA enable/disable
|
||
|
|
properly
|
||
|
|
|
||
|
|
When ECC is not selected, the ECC enable bit must be cleared
|
||
|
|
in the NAND control register. Same applies to DMA.
|
||
|
|
|
||
|
|
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
|
||
|
|
Tested-by: Daniel Mack <zonque@gmail.com>
|
||
|
|
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
||
|
|
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
|
||
|
|
---
|
||
|
|
drivers/mtd/nand/pxa3xx_nand.c | 13 +++++++++++--
|
||
|
|
1 file changed, 11 insertions(+), 2 deletions(-)
|
||
|
|
|
||
|
|
--- a/drivers/mtd/nand/pxa3xx_nand.c
|
||
|
|
+++ b/drivers/mtd/nand/pxa3xx_nand.c
|
||
|
|
@@ -314,8 +314,17 @@ static void pxa3xx_nand_start(struct pxa
|
||
|
|
uint32_t ndcr;
|
||
|
|
|
||
|
|
ndcr = host->reg_ndcr;
|
||
|
|
- ndcr |= info->use_ecc ? NDCR_ECC_EN : 0;
|
||
|
|
- ndcr |= info->use_dma ? NDCR_DMA_EN : 0;
|
||
|
|
+
|
||
|
|
+ if (info->use_ecc)
|
||
|
|
+ ndcr |= NDCR_ECC_EN;
|
||
|
|
+ else
|
||
|
|
+ ndcr &= ~NDCR_ECC_EN;
|
||
|
|
+
|
||
|
|
+ if (info->use_dma)
|
||
|
|
+ ndcr |= NDCR_DMA_EN;
|
||
|
|
+ else
|
||
|
|
+ ndcr &= ~NDCR_DMA_EN;
|
||
|
|
+
|
||
|
|
ndcr |= NDCR_ND_RUN;
|
||
|
|
|
||
|
|
/* clear status bits and run */
|