wifipineapple-openwrt/target/linux/brcm63xx/patches-2.6.25/001-bcm963xx.patch

From 2b2b8e163d28646cbbfde81c900fbb57d6572a11 Mon Sep 17 00:00:00 2001
From: Axel Gembe <ago@bastart.eu.org>
Date: Thu, 15 May 2008 11:00:43 +0200
Subject: [PATCH] bcm963xx: board support


Signed-off-by: Axel Gembe <ago@bastart.eu.org>
---
 arch/mips/Kconfig            |   11 +++++++++++
 arch/mips/Makefile           |    4 ++++
 arch/mips/kernel/cpu-probe.c |   16 ++++++++++++++++
 arch/mips/mm/c-r4k.c         |    7 +++++++
 arch/mips/mm/tlbex.c         |    4 ++++
 arch/mips/pci/Makefile       |    1 +
 include/asm-mips/bootinfo.h  |   12 ++++++++++++
 include/asm-mips/cpu.h       |    7 ++++++-
 8 files changed, 61 insertions(+), 1 deletions(-)

--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -59,6 +59,17 @@
 	help
 	 Support for BCM47XX based boards
 
+config BCM963XX
+       bool "Support for Broadcom BCM963xx SoC"
+       select SYS_SUPPORTS_32BIT_KERNEL
+       select SYS_SUPPORTS_BIG_ENDIAN
+       select SYS_HAS_CPU_MIPS32_R1
+       select HW_HAS_PCI
+       select DMA_NONCOHERENT
+       select IRQ_CPU
+       help
+         This is a fmaily of boards based on the Broadcom MIPS32
+
 config MIPS_COBALT
 	bool "Cobalt Server"
 	select CEVT_R4K
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -560,6 +560,10 @@
 cflags-$(CONFIG_BCM47XX)	+= -Iinclude/asm-mips/mach-bcm47xx
 load-$(CONFIG_BCM47XX)		:= 0xffffffff80001000
 
+core-$(CONFIG_BCM963XX)		+= arch/mips/bcm963xx/
+cflags-$(CONFIG_BCM963XX)	+= -Iinclude/asm-mips/mach-bcm963xx
+load-$(CONFIG_BCM963XX)		:= 0xffffffff8001000
+
 #
 # SNI RM
 #
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -803,6 +803,21 @@
 	case PRID_IMP_BCM4710:
 		c->cputype = CPU_BCM4710;
 		break;
+//	case PRID_IMP_BCM6338:
+//		c->cputype = CPU_BCM6338;
+//		break;
+	case PRID_IMP_BCM6345:
+		c->cputype = CPU_BCM6345;
+		break;
+	case PRID_IMP_BCM6348:
+		c->cputype = CPU_BCM6348;
+		break;
+	case PRID_IMP_BCM6358:
+		c->cputype = CPU_BCM6358;
+		break;
+	case PRID_IMP_BCM3350:
+		c->cputype = CPU_BCM3350;
+		break;
 	default:
 		c->cputype = CPU_UNKNOWN;
 		break;
@@ -887,6 +902,11 @@
 	case CPU_SR71000:	name = "Sandcraft SR71000"; break;
 	case CPU_BCM3302:	name = "Broadcom BCM3302"; break;
 	case CPU_BCM4710:	name = "Broadcom BCM4710"; break;
+	case CPU_BCM6338:	name = "Broadcom BCM6338"; break;
+	case CPU_BCM6345:	name = "Broadcom BCM6345"; break;
+	case CPU_BCM6348:	name = "Broadcom BCM6348"; break;
+	case CPU_BCM6358:	name = "Broadcom BCM6358"; break;
+	case CPU_BCM3350:	name = "Broadcom BCM3350"; break;
 	case CPU_PR4450:	name = "Philips PR4450"; break;
 	case CPU_LOONGSON2:	name = "ICT Loongson-2"; break;
 	default:
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -882,6 +882,13 @@
 		if (!(config & MIPS_CONF_M))
 			panic("Don't know how to probe P-caches on this cpu.");
 
+		if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348 || c->cputype == CPU_BCM6358 || c->cputype == CPU_BCM3350)
+		{
+			printk("bcm963xx: enabling icache and dcache...\n");
+			/* Enable caches */
+			write_c0_diag(read_c0_diag() | 0xC0000000);
+		}
+
 		/*
 		 * So we seem to be a MIPS32 or MIPS64 CPU
 		 * So let's probe the I-cache ...
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -315,6 +315,11 @@
 	case CPU_25KF:
 	case CPU_BCM3302:
 	case CPU_BCM4710:
+//	case CPU_BCM6338:
+	case CPU_BCM6345:
+	case CPU_BCM6348:
+	case CPU_BCM6358:
+	case CPU_BCM3350:
 	case CPU_LOONGSON2:
 		if (m4kc_tlbp_war())
 			uasm_i_nop(p);
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -48,3 +48,4 @@
 obj-$(CONFIG_VICTOR_MPC30X)	+= fixup-mpc30x.o
 obj-$(CONFIG_ZAO_CAPCELLA)	+= fixup-capcella.o
 obj-$(CONFIG_WR_PPMC)		+= fixup-wrppmc.o
+obj-$(CONFIG_BCM963XX)		+= fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -94,6 +94,19 @@
 #define MACH_MSP7120_FPGA       5	/* PMC-Sierra MSP7120 Emulation */
 #define MACH_MSP_OTHER        255	/* PMC-Sierra unknown board type */
 
+#define MACH_WRPPMC             1
+
+/*
+ * Valid machtype for group Broadcom
+ */
+#define MACH_GROUP_BRCM		23	/* Broadcom */
+#define  MACH_BCM47XX		1	/* Broadcom BCM47XX */
+#define  MACH_BCM96338		2
+#define  MACH_BCM96345		3
+#define  MACH_BCM96348		4
+#define  MACH_BCM96358		5
+#define  MACH_BCM3350		6
+
 #define CL_SIZE			COMMAND_LINE_SIZE
 
 extern char *system_type;
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -111,6 +111,11 @@
 
 #define PRID_IMP_BCM4710	0x4000
 #define PRID_IMP_BCM3302	0x9000
+//#define PRID_IMP_BCM6338        0x9000
+#define PRID_IMP_BCM6345        0x8000
+#define PRID_IMP_BCM6348        0x9100
+#define PRID_IMP_BCM6358        0xA000
+#define PRID_IMP_BCM3350	0x28000
 
 /*
  * Definitions for 7:0 on legacy processors
@@ -196,7 +201,8 @@
 	 */
 	CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_74K, CPU_AU1000,
 	CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500, CPU_AU1550,
-	CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
+	CPU_PR4450, CPU_BCM3302, CPU_BCM4710, CPU_BCM6338, CPU_BCM6345, CPU_BCM6348,
+	CPU_BCM6358, CPU_BCM3350,
 
 	/*
 	 * MIPS64 class processors