wifipineapple-openwrt/target/linux/ipq806x/patches/0175-ARM-dts-ipq8064-Add-ne...

From 258a3ea23ec048603debe1621c681b0cc733f236 Mon Sep 17 00:00:00 2001
From: Stephen Boyd <sboyd@codeaurora.org>
Date: Wed, 18 Jun 2014 16:04:37 -0700
Subject: [PATCH 175/182] ARM: dts: ipq8064: Add necessary DT data for Krait
 cpufreq

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi |   45 +++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -23,6 +23,22 @@
 			next-level-cache = <&L2>;
 			qcom,acc = <&acc0>;
 			qcom,saw = <&saw0>;
+			clocks = <&kraitcc 0>;
+			clock-names = "cpu";
+			operating-points = <
+				/* kHz    ignored */
+				1400000 1000000
+				1200000 1000000
+				1000000 1000000
+				 800000 1000000
+				 600000 1000000
+				 384000 1000000
+			>;
+			clock-latency = <100000>;
+
+			cooling-min-state = <0>;
+			cooling-max-state = <10>;
+			#cooling-cells = <2>;
 		};
 
 		cpu@1 {
@@ -33,6 +49,22 @@
 			next-level-cache = <&L2>;
 			qcom,acc = <&acc1>;
 			qcom,saw = <&saw1>;
+			clocks = <&kraitcc 1>;
+			clock-names = "cpu";
+			operating-points = <
+				/* kHz    ignored */
+				1400000 1000000
+				1200000 1000000
+				1000000 1000000
+				 800000 1000000
+				 600000 1000000
+				 384000 1000000
+			>;
+			clock-latency = <100000>;
+
+			cooling-min-state = <0>;
+			cooling-max-state = <10>;
+			#cooling-cells = <2>;
 		};
 
 		L2: l2-cache {
@@ -46,6 +78,11 @@
 		interrupts = <1 10 0x304>;
 	};
 
+	kraitcc: clock-controller {
+		compatible = "qcom,krait-cc-v1";
+		#clock-cells = <1>;
+	};
+
 	reserved-memory {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -102,11 +139,19 @@
 		acc0: clock-controller@2088000 {
 			compatible = "qcom,kpss-acc-v1";
 			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
+			clock-output-names = "acpu0_aux";
 		};
 
 		acc1: clock-controller@2098000 {
 			compatible = "qcom,kpss-acc-v1";
 			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
+			clock-output-names = "acpu1_aux";
+		};
+
+		l2cc: clock-controller@2011000 {
+			compatible = "qcom,kpss-gcc";
+			reg = <0x2011000 0x1000>;
+			clock-output-names = "acpu_l2_aux";
 		};
 
 		saw0: regulator@2089000 {
ipq806x: Add support for IPQ806x chip family Patches are generated using the "format-patch" command from the following location: https://www.codeaurora.org/cgit/quic/kernel/galak-msm/log/?h=apq_ipq_base rev=0771849495b4128cac2faf7d49c85c729fc48b20 Patches numbered 76/77/102/103 have already been integrated in 3.14.12, so they're not in this list. All these patches are either integrated are pending integration into kernel.org, therefore these patches should go away once the kernel gets upgraded to 3.16. Support is currently limited to AP148 board but can be extended to other platforms in the future. These changes do not cover ethernet connectivity. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@42334 3c298f89-4303-0410-b956-a3cf2f4a3e73 2014-08-30 09:32:58 +00:00			`From 258a3ea23ec048603debe1621c681b0cc733f236 Mon Sep 17 00:00:00 2001`
			`From: Stephen Boyd <sboyd@codeaurora.org>`
			`Date: Wed, 18 Jun 2014 16:04:37 -0700`
			`Subject: [PATCH 175/182] ARM: dts: ipq8064: Add necessary DT data for Krait`
			`cpufreq`

			`Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>`
			`---`
			`arch/arm/boot/dts/qcom-ipq8064.dtsi \| 45 +++++++++++++++++++++++++++++++++++`
			`1 file changed, 45 insertions(+)`

			`--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi`
			`+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi`
			`@@ -23,6 +23,22 @@`
			`next-level-cache = <&L2>;`
			`qcom,acc = <&acc0>;`
			`qcom,saw = <&saw0>;`
			`+ clocks = <&kraitcc 0>;`
			`+ clock-names = "cpu";`
			`+ operating-points = <`
			`+ /* kHz ignored */`
			`+ 1400000 1000000`
			`+ 1200000 1000000`
			`+ 1000000 1000000`
			`+ 800000 1000000`
			`+ 600000 1000000`
			`+ 384000 1000000`
			`+ >;`
			`+ clock-latency = <100000>;`
			`+`
			`+ cooling-min-state = <0>;`
			`+ cooling-max-state = <10>;`
			`+ #cooling-cells = <2>;`
			`};`

			`cpu@1 {`
			`@@ -33,6 +49,22 @@`
			`next-level-cache = <&L2>;`
			`qcom,acc = <&acc1>;`
			`qcom,saw = <&saw1>;`
			`+ clocks = <&kraitcc 1>;`
			`+ clock-names = "cpu";`
			`+ operating-points = <`
			`+ /* kHz ignored */`
			`+ 1400000 1000000`
			`+ 1200000 1000000`
			`+ 1000000 1000000`
			`+ 800000 1000000`
			`+ 600000 1000000`
			`+ 384000 1000000`
			`+ >;`
			`+ clock-latency = <100000>;`
			`+`
			`+ cooling-min-state = <0>;`
			`+ cooling-max-state = <10>;`
			`+ #cooling-cells = <2>;`
			`};`

			`L2: l2-cache {`
			`@@ -46,6 +78,11 @@`
			`interrupts = <1 10 0x304>;`
			`};`

			`+ kraitcc: clock-controller {`
			`+ compatible = "qcom,krait-cc-v1";`
			`+ #clock-cells = <1>;`
			`+ };`
			`+`
			`reserved-memory {`
			`#address-cells = <1>;`
			`#size-cells = <1>;`
			`@@ -102,11 +139,19 @@`
			`acc0: clock-controller@2088000 {`
			`compatible = "qcom,kpss-acc-v1";`
			`reg = <0x02088000 0x1000>, <0x02008000 0x1000>;`
			`+ clock-output-names = "acpu0_aux";`
			`};`

			`acc1: clock-controller@2098000 {`
			`compatible = "qcom,kpss-acc-v1";`
			`reg = <0x02098000 0x1000>, <0x02008000 0x1000>;`
			`+ clock-output-names = "acpu1_aux";`
			`+ };`
			`+`
			`+ l2cc: clock-controller@2011000 {`
			`+ compatible = "qcom,kpss-gcc";`
			`+ reg = <0x2011000 0x1000>;`
			`+ clock-output-names = "acpu_l2_aux";`
			`};`

			`saw0: regulator@2089000 {`