mirror of https://github.com/hak5/openwrt.git
263 lines
7.0 KiB
C
263 lines
7.0 KiB
C
/*
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* Simple bitbanged-GPIO SPI driver for ETRAX FS et al.
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*
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* Copyright (c) 2007 Axis Communications AB
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*
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* Author: Hans-Peter Nilsson, inspired by earlier work by
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* Andre Spanberg but mostly by copying large parts of
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* spi_s3c24xx_gpio.c, hence also:
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* Copyright (c) 2006 Ben Dooks
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* Copyright (c) 2006 Simtec Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <asm/io.h>
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#include <asm/arch/board.h>
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/* Our main driver state. */
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struct crisv32_spi_hw_info {
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struct crisv32_iopin sclk;
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struct crisv32_iopin mosi;
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struct crisv32_iopin miso;
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struct crisv32_iopin cs;
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};
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/*
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* The driver state hides behind the spi_bitbang state. We're
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* responsible for allocating that, so we can get a little something
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* for ourselves.
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*/
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struct crisv32_spi_gpio_devdata {
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struct spi_bitbang bitbang;
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struct crisv32_spi_hw_info pins;
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};
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/* Helper function getting the driver state from a spi_device. */
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static inline struct crisv32_spi_hw_info *spidev_to_hw(struct spi_device *spi)
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{
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struct crisv32_spi_gpio_devdata *dd = spi_master_get_devdata(spi->master);
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return &dd->pins;
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}
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/* The SPI-bitbang functions: see spi_bitbang.h at EXPAND_BITBANG_TXRX. */
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static inline void setsck(struct spi_device *spi, int is_on)
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{
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crisv32_io_set(&spidev_to_hw(spi)->sclk, is_on != 0);
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}
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static inline void setmosi(struct spi_device *spi, int is_on)
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{
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crisv32_io_set(&spidev_to_hw(spi)->mosi, is_on != 0);
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}
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static inline u32 getmiso(struct spi_device *spi)
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{
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return crisv32_io_rd(&spidev_to_hw(spi)->miso) != 0 ? 1 : 0;
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}
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#define spidelay(x) ndelay(x)
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#define EXPAND_BITBANG_TXRX
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#include <linux/spi/spi_bitbang.h>
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/*
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* SPI-bitbang word transmit-functions for the four SPI modes,
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* dispatching to the inlined functions we just included.
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*/
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static u32 crisv32_spi_gpio_txrx_mode0(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
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}
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static u32 crisv32_spi_gpio_txrx_mode1(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
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}
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static u32 crisv32_spi_gpio_txrx_mode2(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
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}
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static u32 crisv32_spi_gpio_txrx_mode3(struct spi_device *spi,
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unsigned nsecs, u32 word, u8 bits)
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{
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return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
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}
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/* SPI-bitbang chip-select function. */
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static void crisv32_spi_gpio_chipselect(struct spi_device *spi, int value)
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{
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if (spi->mode & SPI_CS_HIGH)
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crisv32_io_set(&spidev_to_hw(spi)->cs,
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value == BITBANG_CS_ACTIVE ? 1 : 0);
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else
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crisv32_io_set(&spidev_to_hw(spi)->cs,
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value == BITBANG_CS_ACTIVE ? 0 : 1);
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}
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/* Platform-device probe function. */
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static int __devinit crisv32_spi_gpio_probe(struct platform_device *dev)
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{
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struct spi_master *master;
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struct crisv32_spi_gpio_devdata *dd;
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struct resource *res;
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struct crisv32_spi_gpio_controller_data *gc;
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int ret = 0;
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/*
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* We need to get the controller data as a hardware resource,
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* or else it wouldn't be available until *after* the
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* spi_bitbang_start call!
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*/
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res = platform_get_resource_byname(dev, 0, "controller_data_ptr");
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if (res == NULL) {
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dev_err(&dev->dev, "can't get controller_data resource\n");
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return -EIO;
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}
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gc = (struct crisv32_spi_gpio_controller_data *) res->start;
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master = spi_alloc_master(&dev->dev, sizeof *dd);
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if (master == NULL) {
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dev_err(&dev->dev, "failed to allocate spi master\n");
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ret = -ENOMEM;
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goto err;
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}
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dd = spi_master_get_devdata(master);
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platform_set_drvdata(dev, dd);
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/*
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* The device data asks for this driver, and holds the id
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* number, which must be unique among the same-type devices.
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* We use this as the number of this SPI bus.
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*/
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master->bus_num = dev->id;
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/*
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* Allocate pins. Note that thus being allocated as GPIO, we
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* don't have to deconfigure them at the end or if something
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* fails.
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*/
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if ((ret = crisv32_io_get_name(&dd->pins.cs, gc->cs)) != 0
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|| (ret = crisv32_io_get_name(&dd->pins.miso, gc->miso)) != 0
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|| (ret = crisv32_io_get_name(&dd->pins.mosi, gc->mosi)) != 0
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|| (ret = crisv32_io_get_name(&dd->pins.sclk, gc->sclk)) != 0)
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goto err_no_pins;
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/* Set directions of the SPI pins. */
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crisv32_io_set_dir(&dd->pins.cs, crisv32_io_dir_out);
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crisv32_io_set_dir(&dd->pins.sclk, crisv32_io_dir_out);
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crisv32_io_set_dir(&dd->pins.miso, crisv32_io_dir_in);
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crisv32_io_set_dir(&dd->pins.mosi, crisv32_io_dir_out);
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/* Set state of the SPI pins. */
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dev_dbg(&dev->dev, "cs.port 0x%x, pin: %d\n"
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dd->pins.cs.port, dd->pins.cs.bit);
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/*
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* Can't use crisv32_spi_gpio_chipselect(spi, 1) here; we
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* don't have a proper "spi" until after spi_bitbang_start.
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*/
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crisv32_io_set(&dd->pins.cs, 1);
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crisv32_io_set(&dd->pins.sclk, 0);
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crisv32_io_set(&dd->pins.mosi, 0);
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/* Setup SPI bitbang adapter hooks. */
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dd->bitbang.master = spi_master_get(master);
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dd->bitbang.chipselect = crisv32_spi_gpio_chipselect;
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dd->bitbang.txrx_word[SPI_MODE_0] = crisv32_spi_gpio_txrx_mode0;
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dd->bitbang.txrx_word[SPI_MODE_1] = crisv32_spi_gpio_txrx_mode1;
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dd->bitbang.txrx_word[SPI_MODE_2] = crisv32_spi_gpio_txrx_mode2;
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dd->bitbang.txrx_word[SPI_MODE_3] = crisv32_spi_gpio_txrx_mode3;
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ret = spi_bitbang_start(&dd->bitbang);
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if (ret)
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goto err_no_bitbang;
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printk (KERN_INFO "CRIS v32 SPI driver for GPIO"
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" (cs: %s, miso: %s, mosi: %s, sclk: %s)\n",
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gc->cs, gc->miso, gc->mosi, gc->sclk);
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return 0;
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err_no_bitbang:
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spi_master_put(dd->bitbang.master);
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err_no_pins:
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platform_set_drvdata(dev, NULL);
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err:
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return ret;
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}
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/* Platform-device remove-function. */
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static int __devexit crisv32_spi_gpio_remove(struct platform_device *dev)
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{
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struct crisv32_spi_gpio_devdata *dd = platform_get_drvdata(dev);
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int ret;
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ret = spi_bitbang_stop(&dd->bitbang);
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if (ret != 0)
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return ret;
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spi_master_put(dd->bitbang.master);
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platform_set_drvdata(dev, NULL);
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return 0;
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}
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/*
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* For the time being, there's no suspend/resume support to care
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* about, so we let those handlers default to NULL.
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*/
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static struct platform_driver crisv32_spi_gpio_drv = {
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.probe = crisv32_spi_gpio_probe,
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.remove = __devexit_p(crisv32_spi_gpio_remove),
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.driver = {
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.name = "spi_crisv32_gpio",
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.owner = THIS_MODULE,
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},
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};
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/* Module init function. */
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static int __devinit crisv32_spi_gpio_init(void)
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{
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return platform_driver_register(&crisv32_spi_gpio_drv);
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}
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/* Module exit function. */
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static void __devexit crisv32_spi_gpio_exit(void)
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{
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platform_driver_unregister(&crisv32_spi_gpio_drv);
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}
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module_init(crisv32_spi_gpio_init);
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module_exit(crisv32_spi_gpio_exit);
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MODULE_DESCRIPTION("CRIS v32 SPI-GPIO Driver");
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MODULE_AUTHOR("Hans-Peter Nilsson, <hp@axis.com>");
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MODULE_LICENSE("GPL");
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