mirror of https://github.com/hak5/openwrt.git
120 lines
4.0 KiB
Diff
120 lines
4.0 KiB
Diff
From adcc81f148d733b7e8e641300c5590a2cdc13bf3 Mon Sep 17 00:00:00 2001
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From: Paul Burton <paul.burton@mips.com>
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Date: Thu, 20 Dec 2018 17:45:43 +0000
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Subject: MIPS: math-emu: Write-protect delay slot emulation pages
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Mapping the delay slot emulation page as both writeable & executable
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presents a security risk, in that if an exploit can write to & jump into
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the page then it can be used as an easy way to execute arbitrary code.
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Prevent this by mapping the page read-only for userland, and using
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access_process_vm() with the FOLL_FORCE flag to write to it from
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mips_dsemul().
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This will likely be less efficient due to copy_to_user_page() performing
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cache maintenance on a whole page, rather than a single line as in the
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previous use of flush_cache_sigtramp(). However this delay slot
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emulation code ought not to be running in any performance critical paths
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anyway so this isn't really a problem, and we can probably do better in
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copy_to_user_page() anyway in future.
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A major advantage of this approach is that the fix is small & simple to
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backport to stable kernels.
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Reported-by: Andy Lutomirski <luto@kernel.org>
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Signed-off-by: Paul Burton <paul.burton@mips.com>
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Fixes: 432c6bacbd0c ("MIPS: Use per-mm page to execute branch delay slot instructions")
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Cc: stable@vger.kernel.org # v4.8+
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Cc: linux-mips@vger.kernel.org
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Cc: linux-kernel@vger.kernel.org
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Cc: Rich Felker <dalias@libc.org>
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Cc: David Daney <david.daney@cavium.com>
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---
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arch/mips/kernel/vdso.c | 4 ++--
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arch/mips/math-emu/dsemul.c | 38 ++++++++++++++++++++------------------
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2 files changed, 22 insertions(+), 20 deletions(-)
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--- a/arch/mips/kernel/vdso.c
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+++ b/arch/mips/kernel/vdso.c
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@@ -111,8 +111,8 @@ int arch_setup_additional_pages(struct l
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/* Map delay slot emulation page */
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base = mmap_region(NULL, STACK_TOP, PAGE_SIZE,
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- VM_READ|VM_WRITE|VM_EXEC|
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- VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC,
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+ VM_READ | VM_EXEC |
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+ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
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0);
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if (IS_ERR_VALUE(base)) {
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ret = base;
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--- a/arch/mips/math-emu/dsemul.c
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+++ b/arch/mips/math-emu/dsemul.c
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@@ -211,8 +211,9 @@ int mips_dsemul(struct pt_regs *regs, mi
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{
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int isa16 = get_isa16_mode(regs->cp0_epc);
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mips_instruction break_math;
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- struct emuframe __user *fr;
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- int err, fr_idx;
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+ unsigned long fr_uaddr;
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+ struct emuframe fr;
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+ int fr_idx, ret;
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/* NOP is easy */
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if (ir == 0)
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@@ -247,27 +248,31 @@ int mips_dsemul(struct pt_regs *regs, mi
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fr_idx = alloc_emuframe();
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if (fr_idx == BD_EMUFRAME_NONE)
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return SIGBUS;
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- fr = &dsemul_page()[fr_idx];
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/* Retrieve the appropriately encoded break instruction */
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break_math = BREAK_MATH(isa16);
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/* Write the instructions to the frame */
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if (isa16) {
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- err = __put_user(ir >> 16,
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- (u16 __user *)(&fr->emul));
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- err |= __put_user(ir & 0xffff,
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- (u16 __user *)((long)(&fr->emul) + 2));
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- err |= __put_user(break_math >> 16,
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- (u16 __user *)(&fr->badinst));
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- err |= __put_user(break_math & 0xffff,
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- (u16 __user *)((long)(&fr->badinst) + 2));
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+ union mips_instruction _emul = {
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+ .halfword = { ir >> 16, ir }
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+ };
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+ union mips_instruction _badinst = {
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+ .halfword = { break_math >> 16, break_math }
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+ };
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+
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+ fr.emul = _emul.word;
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+ fr.badinst = _badinst.word;
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} else {
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- err = __put_user(ir, &fr->emul);
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- err |= __put_user(break_math, &fr->badinst);
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+ fr.emul = ir;
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+ fr.badinst = break_math;
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}
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- if (unlikely(err)) {
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+ /* Write the frame to user memory */
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+ fr_uaddr = (unsigned long)&dsemul_page()[fr_idx];
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+ ret = access_process_vm(current, fr_uaddr, &fr, sizeof(fr),
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+ FOLL_FORCE | FOLL_WRITE);
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+ if (unlikely(ret != sizeof(fr))) {
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MIPS_FPU_EMU_INC_STATS(errors);
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free_emuframe(fr_idx, current->mm);
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return SIGBUS;
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@@ -279,10 +284,7 @@ int mips_dsemul(struct pt_regs *regs, mi
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atomic_set(¤t->thread.bd_emu_frame, fr_idx);
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/* Change user register context to execute the frame */
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- regs->cp0_epc = (unsigned long)&fr->emul | isa16;
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-
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- /* Ensure the icache observes our newly written frame */
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- flush_cache_sigtramp((unsigned long)&fr->emul);
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+ regs->cp0_epc = fr_uaddr | isa16;
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return 0;
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}
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