mirror of https://github.com/hak5/openwrt.git
472 lines
12 KiB
Diff
472 lines
12 KiB
Diff
From 4cf0b74c175cb5cb751e449223c0baafc2f98499 Mon Sep 17 00:00:00 2001
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From: Sean Wang <sean.wang@mediatek.com>
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Date: Mon, 23 Oct 2017 15:16:45 +0800
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Subject: [PATCH 138/224] rtc: mediatek: add driver for RTC on MT7622 SoC
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This patch introduces the driver for the RTC on MT7622 SoC.
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Signed-off-by: Sean Wang <sean.wang@mediatek.com>
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Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
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Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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---
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drivers/rtc/Kconfig | 10 ++
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drivers/rtc/Makefile | 1 +
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drivers/rtc/rtc-mt7622.c | 422 +++++++++++++++++++++++++++++++++++++++++++++++
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3 files changed, 433 insertions(+)
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create mode 100644 drivers/rtc/rtc-mt7622.c
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--- a/drivers/rtc/Kconfig
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+++ b/drivers/rtc/Kconfig
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@@ -1715,6 +1715,16 @@ config RTC_DRV_MT6397
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If you want to use Mediatek(R) RTC interface, select Y or M here.
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+config RTC_DRV_MT7622
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+ tristate "MediaTek SoC based RTC"
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+ depends on ARCH_MEDIATEK || COMPILE_TEST
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+ help
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+ This enables support for the real time clock built in the MediaTek
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+ SoCs.
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+
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+ This drive can also be built as a module. If so, the module
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+ will be called rtc-mt7622.
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+
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config RTC_DRV_XGENE
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tristate "APM X-Gene RTC"
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depends on HAS_IOMEM
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--- a/drivers/rtc/Makefile
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+++ b/drivers/rtc/Makefile
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@@ -103,6 +103,7 @@ obj-$(CONFIG_RTC_DRV_MPC5121) += rtc-mpc
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obj-$(CONFIG_RTC_DRV_VRTC) += rtc-mrst.o
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obj-$(CONFIG_RTC_DRV_MSM6242) += rtc-msm6242.o
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obj-$(CONFIG_RTC_DRV_MT6397) += rtc-mt6397.o
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+obj-$(CONFIG_RTC_DRV_MT7622) += rtc-mt7622.o
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obj-$(CONFIG_RTC_DRV_MV) += rtc-mv.o
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obj-$(CONFIG_RTC_DRV_MXC) += rtc-mxc.o
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obj-$(CONFIG_RTC_DRV_NUC900) += rtc-nuc900.o
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--- /dev/null
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+++ b/drivers/rtc/rtc-mt7622.c
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@@ -0,0 +1,422 @@
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+/*
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+ * Driver for MediaTek SoC based RTC
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+ *
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+ * Copyright (C) 2017 Sean Wang <sean.wang@mediatek.com>
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/interrupt.h>
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+#include <linux/module.h>
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+#include <linux/of_address.h>
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+#include <linux/of_device.h>
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+#include <linux/platform_device.h>
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+#include <linux/rtc.h>
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+
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+#define MTK_RTC_DEV KBUILD_MODNAME
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+
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+#define MTK_RTC_PWRCHK1 0x4
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+#define RTC_PWRCHK1_MAGIC 0xc6
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+
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+#define MTK_RTC_PWRCHK2 0x8
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+#define RTC_PWRCHK2_MAGIC 0x9a
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+
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+#define MTK_RTC_KEY 0xc
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+#define RTC_KEY_MAGIC 0x59
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+
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+#define MTK_RTC_PROT1 0x10
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+#define RTC_PROT1_MAGIC 0xa3
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+
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+#define MTK_RTC_PROT2 0x14
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+#define RTC_PROT2_MAGIC 0x57
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+
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+#define MTK_RTC_PROT3 0x18
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+#define RTC_PROT3_MAGIC 0x67
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+
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+#define MTK_RTC_PROT4 0x1c
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+#define RTC_PROT4_MAGIC 0xd2
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+
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+#define MTK_RTC_CTL 0x20
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+#define RTC_RC_STOP BIT(0)
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+
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+#define MTK_RTC_DEBNCE 0x2c
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+#define RTC_DEBNCE_MASK GENMASK(2, 0)
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+
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+#define MTK_RTC_INT 0x30
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+#define RTC_INT_AL_STA BIT(4)
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+
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+/*
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+ * Ranges from 0x40 to 0x78 provide RTC time setup for year, month,
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+ * day of month, day of week, hour, minute and second.
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+ */
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+#define MTK_RTC_TREG(_t, _f) (0x40 + (0x4 * (_f)) + ((_t) * 0x20))
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+
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+#define MTK_RTC_AL_CTL 0x7c
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+#define RTC_AL_EN BIT(0)
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+#define RTC_AL_ALL GENMASK(7, 0)
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+
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+/*
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+ * The offset is used in the translation for the year between in struct
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+ * rtc_time and in hardware register MTK_RTC_TREG(x,MTK_YEA)
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+ */
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+#define MTK_RTC_TM_YR_OFFSET 100
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+
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+/*
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+ * The lowest value for the valid tm_year. RTC hardware would take incorrectly
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+ * tm_year 100 as not a leap year and thus it is also required being excluded
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+ * from the valid options.
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+ */
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+#define MTK_RTC_TM_YR_L (MTK_RTC_TM_YR_OFFSET + 1)
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+
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+/*
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+ * The most year the RTC can hold is 99 and the next to 99 in year register
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+ * would be wraparound to 0, for MT7622.
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+ */
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+#define MTK_RTC_HW_YR_LIMIT 99
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+
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+/* The highest value for the valid tm_year */
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+#define MTK_RTC_TM_YR_H (MTK_RTC_TM_YR_OFFSET + MTK_RTC_HW_YR_LIMIT)
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+
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+/* Simple macro helps to check whether the hardware supports the tm_year */
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+#define MTK_RTC_TM_YR_VALID(_y) ((_y) >= MTK_RTC_TM_YR_L && \
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+ (_y) <= MTK_RTC_TM_YR_H)
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+
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+/* Types of the function the RTC provides are time counter and alarm. */
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+enum {
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+ MTK_TC,
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+ MTK_AL,
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+};
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+
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+/* Indexes are used for the pointer to relevant registers in MTK_RTC_TREG */
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+enum {
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+ MTK_YEA,
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+ MTK_MON,
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+ MTK_DOM,
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+ MTK_DOW,
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+ MTK_HOU,
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+ MTK_MIN,
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+ MTK_SEC
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+};
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+
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+struct mtk_rtc {
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+ struct rtc_device *rtc;
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+ void __iomem *base;
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+ int irq;
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+ struct clk *clk;
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+};
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+
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+static void mtk_w32(struct mtk_rtc *rtc, u32 reg, u32 val)
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+{
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+ writel_relaxed(val, rtc->base + reg);
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+}
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+
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+static u32 mtk_r32(struct mtk_rtc *rtc, u32 reg)
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+{
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+ return readl_relaxed(rtc->base + reg);
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+}
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+
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+static void mtk_rmw(struct mtk_rtc *rtc, u32 reg, u32 mask, u32 set)
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+{
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+ u32 val;
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+
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+ val = mtk_r32(rtc, reg);
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+ val &= ~mask;
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+ val |= set;
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+ mtk_w32(rtc, reg, val);
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+}
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+
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+static void mtk_set(struct mtk_rtc *rtc, u32 reg, u32 val)
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+{
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+ mtk_rmw(rtc, reg, 0, val);
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+}
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+
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+static void mtk_clr(struct mtk_rtc *rtc, u32 reg, u32 val)
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+{
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+ mtk_rmw(rtc, reg, val, 0);
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+}
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+
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+static void mtk_rtc_hw_init(struct mtk_rtc *hw)
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+{
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+ /* The setup of the init sequence is for allowing RTC got to work */
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+ mtk_w32(hw, MTK_RTC_PWRCHK1, RTC_PWRCHK1_MAGIC);
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+ mtk_w32(hw, MTK_RTC_PWRCHK2, RTC_PWRCHK2_MAGIC);
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+ mtk_w32(hw, MTK_RTC_KEY, RTC_KEY_MAGIC);
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+ mtk_w32(hw, MTK_RTC_PROT1, RTC_PROT1_MAGIC);
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+ mtk_w32(hw, MTK_RTC_PROT2, RTC_PROT2_MAGIC);
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+ mtk_w32(hw, MTK_RTC_PROT3, RTC_PROT3_MAGIC);
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+ mtk_w32(hw, MTK_RTC_PROT4, RTC_PROT4_MAGIC);
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+ mtk_rmw(hw, MTK_RTC_DEBNCE, RTC_DEBNCE_MASK, 0);
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+ mtk_clr(hw, MTK_RTC_CTL, RTC_RC_STOP);
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+}
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+
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+static void mtk_rtc_get_alarm_or_time(struct mtk_rtc *hw, struct rtc_time *tm,
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+ int time_alarm)
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+{
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+ u32 year, mon, mday, wday, hour, min, sec;
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+
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+ /*
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+ * Read again until the field of the second is not changed which
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+ * ensures all fields in the consistent state. Note that MTK_SEC must
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+ * be read first. In this way, it guarantees the others remain not
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+ * changed when the results for two MTK_SEC consecutive reads are same.
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+ */
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+ do {
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+ sec = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC));
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+ min = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_MIN));
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+ hour = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_HOU));
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+ wday = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_DOW));
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+ mday = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_DOM));
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+ mon = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_MON));
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+ year = mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_YEA));
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+ } while (sec != mtk_r32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC)));
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+
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+ tm->tm_sec = sec;
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+ tm->tm_min = min;
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+ tm->tm_hour = hour;
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+ tm->tm_wday = wday;
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+ tm->tm_mday = mday;
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+ tm->tm_mon = mon - 1;
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+
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+ /* Rebase to the absolute year which userspace queries */
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+ tm->tm_year = year + MTK_RTC_TM_YR_OFFSET;
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+}
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+
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+static void mtk_rtc_set_alarm_or_time(struct mtk_rtc *hw, struct rtc_time *tm,
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+ int time_alarm)
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+{
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+ u32 year;
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+
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+ /* Rebase to the relative year which RTC hardware requires */
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+ year = tm->tm_year - MTK_RTC_TM_YR_OFFSET;
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+
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+ mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_YEA), year);
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+ mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_MON), tm->tm_mon + 1);
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+ mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_DOW), tm->tm_wday);
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+ mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_DOM), tm->tm_mday);
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+ mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_HOU), tm->tm_hour);
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+ mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_MIN), tm->tm_min);
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+ mtk_w32(hw, MTK_RTC_TREG(time_alarm, MTK_SEC), tm->tm_sec);
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+}
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+
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+static irqreturn_t mtk_rtc_alarmirq(int irq, void *id)
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+{
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+ struct mtk_rtc *hw = (struct mtk_rtc *)id;
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+ u32 irq_sta;
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+
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+ irq_sta = mtk_r32(hw, MTK_RTC_INT);
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+ if (irq_sta & RTC_INT_AL_STA) {
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+ /* Stop alarm also implicitly disables the alarm interrupt */
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+ mtk_w32(hw, MTK_RTC_AL_CTL, 0);
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+ rtc_update_irq(hw->rtc, 1, RTC_IRQF | RTC_AF);
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+
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+ /* Ack alarm interrupt status */
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+ mtk_w32(hw, MTK_RTC_INT, RTC_INT_AL_STA);
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+ return IRQ_HANDLED;
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+ }
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+
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+ return IRQ_NONE;
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+}
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+
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+static int mtk_rtc_gettime(struct device *dev, struct rtc_time *tm)
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+{
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+ struct mtk_rtc *hw = dev_get_drvdata(dev);
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+
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+ mtk_rtc_get_alarm_or_time(hw, tm, MTK_TC);
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+
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+ return rtc_valid_tm(tm);
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+}
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+
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+static int mtk_rtc_settime(struct device *dev, struct rtc_time *tm)
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+{
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+ struct mtk_rtc *hw = dev_get_drvdata(dev);
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+
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+ if (!MTK_RTC_TM_YR_VALID(tm->tm_year))
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+ return -EINVAL;
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+
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+ /* Stop time counter before setting a new one*/
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+ mtk_set(hw, MTK_RTC_CTL, RTC_RC_STOP);
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+
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+ mtk_rtc_set_alarm_or_time(hw, tm, MTK_TC);
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+
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+ /* Restart the time counter */
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+ mtk_clr(hw, MTK_RTC_CTL, RTC_RC_STOP);
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+
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+ return 0;
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+}
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+
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+static int mtk_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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+{
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+ struct mtk_rtc *hw = dev_get_drvdata(dev);
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+ struct rtc_time *alrm_tm = &wkalrm->time;
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+
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+ mtk_rtc_get_alarm_or_time(hw, alrm_tm, MTK_AL);
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+
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+ wkalrm->enabled = !!(mtk_r32(hw, MTK_RTC_AL_CTL) & RTC_AL_EN);
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+ wkalrm->pending = !!(mtk_r32(hw, MTK_RTC_INT) & RTC_INT_AL_STA);
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+
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+ return 0;
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+}
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+
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+static int mtk_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
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+{
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+ struct mtk_rtc *hw = dev_get_drvdata(dev);
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+ struct rtc_time *alrm_tm = &wkalrm->time;
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+
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+ if (!MTK_RTC_TM_YR_VALID(alrm_tm->tm_year))
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+ return -EINVAL;
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+
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+ /*
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+ * Stop the alarm also implicitly including disables interrupt before
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+ * setting a new one.
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+ */
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+ mtk_clr(hw, MTK_RTC_AL_CTL, RTC_AL_EN);
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+
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+ /*
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+ * Avoid contention between mtk_rtc_setalarm and IRQ handler so that
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+ * disabling the interrupt and awaiting for pending IRQ handler to
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+ * complete.
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+ */
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+ synchronize_irq(hw->irq);
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+
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+ mtk_rtc_set_alarm_or_time(hw, alrm_tm, MTK_AL);
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+
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+ /* Restart the alarm with the new setup */
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+ mtk_w32(hw, MTK_RTC_AL_CTL, RTC_AL_ALL);
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+
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+ return 0;
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+}
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+
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+static const struct rtc_class_ops mtk_rtc_ops = {
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+ .read_time = mtk_rtc_gettime,
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+ .set_time = mtk_rtc_settime,
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+ .read_alarm = mtk_rtc_getalarm,
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+ .set_alarm = mtk_rtc_setalarm,
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+};
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+
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+static const struct of_device_id mtk_rtc_match[] = {
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+ { .compatible = "mediatek,mt7622-rtc" },
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+ { .compatible = "mediatek,soc-rtc" },
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+ {},
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+};
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+
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+static int mtk_rtc_probe(struct platform_device *pdev)
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+{
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+ struct mtk_rtc *hw;
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+ struct resource *res;
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+ int ret;
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+
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+ hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
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+ if (!hw)
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+ return -ENOMEM;
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+
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+ platform_set_drvdata(pdev, hw);
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ hw->base = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(hw->base))
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+ return PTR_ERR(hw->base);
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+
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+ hw->clk = devm_clk_get(&pdev->dev, "rtc");
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+ if (IS_ERR(hw->clk)) {
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+ dev_err(&pdev->dev, "No clock\n");
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+ return PTR_ERR(hw->clk);
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+ }
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+
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+ ret = clk_prepare_enable(hw->clk);
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+ if (ret)
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+ return ret;
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+
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+ hw->irq = platform_get_irq(pdev, 0);
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+ if (hw->irq < 0) {
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+ dev_err(&pdev->dev, "No IRQ resource\n");
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+ ret = hw->irq;
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+ goto err;
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+ }
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+
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+ ret = devm_request_irq(&pdev->dev, hw->irq, mtk_rtc_alarmirq,
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+ 0, dev_name(&pdev->dev), hw);
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+ if (ret) {
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+ dev_err(&pdev->dev, "Can't request IRQ\n");
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+ goto err;
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+ }
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+
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+ mtk_rtc_hw_init(hw);
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+
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+ device_init_wakeup(&pdev->dev, true);
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+
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+ hw->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
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+ &mtk_rtc_ops, THIS_MODULE);
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+ if (IS_ERR(hw->rtc)) {
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+ ret = PTR_ERR(hw->rtc);
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+ dev_err(&pdev->dev, "Unable to register device\n");
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+ goto err;
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+ }
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+
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+ return 0;
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+err:
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+ clk_disable_unprepare(hw->clk);
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+
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+ return ret;
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+}
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+
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+static int mtk_rtc_remove(struct platform_device *pdev)
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+{
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+ struct mtk_rtc *hw = platform_get_drvdata(pdev);
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+
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+ clk_disable_unprepare(hw->clk);
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+
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+ return 0;
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+}
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+
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+#ifdef CONFIG_PM_SLEEP
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+static int mtk_rtc_suspend(struct device *dev)
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+{
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+ struct mtk_rtc *hw = dev_get_drvdata(dev);
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+
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+ if (device_may_wakeup(dev))
|
|
+ enable_irq_wake(hw->irq);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int mtk_rtc_resume(struct device *dev)
|
|
+{
|
|
+ struct mtk_rtc *hw = dev_get_drvdata(dev);
|
|
+
|
|
+ if (device_may_wakeup(dev))
|
|
+ disable_irq_wake(hw->irq);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static SIMPLE_DEV_PM_OPS(mtk_rtc_pm_ops, mtk_rtc_suspend, mtk_rtc_resume);
|
|
+
|
|
+#define MTK_RTC_PM_OPS (&mtk_rtc_pm_ops)
|
|
+#else /* CONFIG_PM */
|
|
+#define MTK_RTC_PM_OPS NULL
|
|
+#endif /* CONFIG_PM */
|
|
+
|
|
+static struct platform_driver mtk_rtc_driver = {
|
|
+ .probe = mtk_rtc_probe,
|
|
+ .remove = mtk_rtc_remove,
|
|
+ .driver = {
|
|
+ .name = MTK_RTC_DEV,
|
|
+ .of_match_table = mtk_rtc_match,
|
|
+ .pm = MTK_RTC_PM_OPS,
|
|
+ },
|
|
+};
|
|
+
|
|
+module_platform_driver(mtk_rtc_driver);
|
|
+
|
|
+MODULE_DESCRIPTION("MediaTek SoC based RTC Driver");
|
|
+MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
|
|
+MODULE_LICENSE("GPL");
|